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TSW14J56EVM: TSW14J56EVM REV E

Part Number: TSW14J56EVM

Hi All.

I hope you are all healty and well.

I have a TSW14J56 REV D and TSW14J56 REV E board and installed HSDC PRO v5.00. REV D works fine but when I tried to use REV E the same problem occurs with the Steve Widener.

Jim S provided a newer version (v5.1) in this thread (https://e2e.ti.com/support/data-converters/f/73/p/915672/3383120?tisearch=e2e-quicksearch&keymatch=TSW14J56%20REV%20E#3383120) but unfortunately it's no longer available.

Can anyone provide a new link to download for the v5.1?

Best Ugur

  • Ugur,

    Here is the latest version (5.15).

    Regards,

    Jim

    txn.box.com/.../tg3dgkncu1mvf7tillcfs3savmsrn94s

  • Thanks Jim. I can't try it until tomorrow due to pandemic issues. I will let you know the results.

    Best.

    Ugur

  • Hi Jim,

    Finally I had time to try the v5.15 but i have the same error again. When I connect the revD board.

  • Ugur,

    What is the status of the LED's on the TSW14J56EVM? Make sure the 5V source can provide at least 4 amps of current. What ADC or DAC are you testing this with? Please send a screen shot of the entire page of HSDC Pro GUI, not just the error message.

    Regards,

    JIm

  • Hello Jim,
    I am facing the same problem. I have the revE TSW14J56 evulation board and I am providing 5V 5A to both ADC and FPGA. The ADC is ADS54J60, the recommended evalulation board with the FPGA. HSDC Pro recognizes the board as revD version. I addded the error screen shot with the whole GUI. I also downloaded the new version of HSDC Pro but it did not work. (Ps: The revD model of the FPGA can read data from the ADC)

  • Ahmet,

    After programming the ADC EVM, make sure D2 (PLL2 LOCKED) LED is turned on. If not, the TSW14J56EVM will not get a valid clock. On the TSW14J56EVM, after the firmware is downloaded, LED's D10, D17, D3, and D8 should all be on. All power status blue LED's should also be on.

    After you press capture, LED D3 should turn off indicating SYNC has been established and LED D4 should be blinking indicating the TSW is receiving a clock from the ADC EVM.

    If D2 on the ADC is on and you are still getting this error, send a screen shot of the LMK04828 clock outputs tab from the ADC GUI.

    Regards,

    Jim

     

  • Hello Jim,

    After I programmed ADC, the LED on the ADC (D2) is turned on. I think ADC and FPGA are synced. 

    When I upload the firmware, the LEDs, D10, D17, D3 are on. But D8 is off. 

    Also when I press the capture button, D4 is blinking and D3 is OFF. But still the error is the same and I cannot obtain any data.

    My clock output tab screenshot is down below.

  • Ahmet,

    The TSW14J56EVM board has a hard failure with D8 off and D6 and D7 on (DDR memory failed initialization). You will need to request a replacement from whoever you ordered this board.

    If you bought this from a distributor, you will have to work with them to get a replacement. If you bought it from the TI Store, the following link has the details and a link to the form to start the return process.  Once you are on the returns and refunds page of the TI Store look for the hyperlink which says: TI store customer support form. 

    Regards,

    Jim

    www.ti.com/.../ti-store-order.html