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ADS1293: ADC Sampling in Test Mode

Part Number: ADS1293

Hi, 

I used ADS1293 setting of test mode for test ADC sampling and found a phenomenon. When setting zero test / positive test / negative test, ADC will sampling some value of deviation.

It's any reason can cause ADC sampling abnormal? In the other hand, could you please provide the range of expected in different test mode?

Thanks

  • Hi Shawn,

    Thank you for the post. I'll check with the team and get back to you. 

    Thanks.

    -TC

  • Hi Shawn,

    Thank you for your patience. After checking with the team, we don't have any additional data for the test signals to share. For your reference, I have tested all the test signals on the EVM. Please see the attached plots below for these test signals and their corresponding Mean and Peak-to-Peak performance. The DR is set to 853SPS, and the capture time is 5 seconds. Please let me know if you have any questions on the setup below. 

    DR = 853SPS, Sample Time = 5 second.

    CH1 = Zero Test signal;  Mean =  12.91uV, Peak-to-Peak =  19.87uVpp

    CH1 = +Test signal;  Mean =    202.21uV, Peak-to-Peak =  19.08uVpp

    CH1 = -Test signal;  Mean =  -202.12uV, Peak-to-Peak =  20.66uVpp


    Thanks.

    -TC