ADS1201: Transmit MOUT and MCLK thru a fiber optic device

Prodigy 60 points

Replies: 6

Views: 56

Part Number: ADS1201

Hi Tom,

The processor I'm looking at is the TMS320F28379D. I started with the SDFM example files. Any advice is much appreciated!

Thanks,

6 Replies

  • Hi Lakshmi,

    From the TMS320F28379D side of things, you would be operating in Mode 0 (refer to Figure 8-56). You would need to caclulate what your divide by ratio needs to be for tc(sdc)m0 to match the MCLK specification for the ADS1202, which is 1MHz maximum, 320kHz typical.  You also need to pay attention to the clock edges for SDx_Cy and SDx_Dy of the DSP versus MCLK and DOUT of the ADS1202.

    The timing diagram for the ADS1201 is shown in Figure 7 - the output data changes with a rising MCLK edge and would be considered valid on a falling MCLK edge.  The SDFM however, expects to see valid data on a rising clock edge, so you might need to get a little creative here.  You could create MCLK with a PWM output and then invert it before sending it to the SDFM.

     

    Regards,

    Tom

  • In reply to Tom Hendrick:

    Hi Tom,

    Thanks for the info! I'm currently verifying the raw output of the ADS1201 - I have configured it as per Fig. 6 of the datasheet for +/- 10 V input. The clock input is 1MHz (50 % duty). I have the following questions:

    1. Firstly, is the output of the ADS1201 variable frequency in addition to variable duty? It is not always equal to clock frequency it seems. Is this correct?

    2. Attached is a screen capture showing the MOUT pin output and the unscaled analog signal the SDM is used to measure (the signal is scaled before applying at the input of the SDM):

    After scaling, the analog signal at the input pins of the SDM is < 3 V with a 2.5 V offset (max value is about 2.6 V). Pink waveform is the unscaled analog signal is 'A', green is the SDM MOUT output.

    3. The change in the duty doesn't seem linear for a changing analog input. 

    4. The output is not constant when the analog input is constant (before and after the triangular part). I thought this part should be fixed duty/frequency?

    Could you please help me understand?

    Thanks,

  • In reply to Lakshmi Ravi:

    Hi Tom,

    Thanks for the info! I'm currently verifying the raw output of the ADS1201 - I have configured it as per Fig. 6 of the datasheet for +/- 10 V input. The clock input is 1MHz (50 % duty). I have the following questions:

    1. Firstly, is the output of the ADS1201 variable frequency in addition to variable duty? It is not always equal to clock frequency it seems. Is this correct?

    2. Attached is a screen capture showing the MOUT pin output and the unscaled analog signal the SDM is used to measure (the signal is scaled before applying at the input of the SDM):

    ADS1201 output

    After scaling, the analog signal at the input pins of the SDM is < 3 V with a 2.5 V offset (max value is about 2.6 V). Pink waveform is the unscaled analog signal is 'A', green is the SDM MOUT output.

    3. The change in the duty doesn't seem linear for a changing analog input.

    4. The output is not constant when the analog input is constant (before and after the triangular part). I thought this part should be fixed duty/frequency?

    Could you please help me understand?

    Thanks,

  • In reply to Lakshmi Ravi:

    Hi Lakshmi,

    Your screen capture did not come through, can you try posting that again?  For the other questions, the output of the modulator is not a PWM signal, its just a stream of 1's and 0's.  The MOUT frequency should not change and each 'bit' will be 1uS wide based on your 1MHz clock.  The density of 1's and 0's changes as you modify the input voltage.  A fixed input voltage should give you a fixed 1's density - 0V for example would give you nearly 100% 0's.  As you increase to 5V, you will have nearly 100% 1's.

     

    Regards,

    Tom

  • In reply to Tom Hendrick:

    Hi Tom,

    I have attached the picture again - based on your explanation, I'm still not able to understand the output in my screenshot.. I waveform channels are as per my previous post.

    Also, how does the output change with the change in the input range to +/- 10 V with the use of the Vbias?

    Thanks,

    Lakshmi

  • In reply to Lakshmi Ravi:

    Hi again Lakshmi!

    Thanks for the screen shot!  It's probably easiest if you just start off with a signal generator and go directly to the IN+ pin of the AMC1201 to visualize how the part works.  If you ground IN- and put a sawtooth wave to IN+ that ramps from 0V to 5V, you should see the bit stream output look very much like the Figure 8 diagram.  If you maintain your +/-10V configuration with a differential signal, that would work as well, just push it to full scale.  Use a low frequency input signal while you watch the bitstream change.

    What is the nature of the signal you are trying to capture with the ADS1201?  What are you using for a digital filter for the output bit stream and what is your expected OSR/data rate?

     

    Regards,

    Tom