Part Number: ADS1256
I am having a problem getting the proper accuracy with the ADS1256 on the custom board designed. ADC is reading a value of around 180mv, though i find a much less value on the board and i am unable to minimize the voltage on the channel input. I can share the schematics and board Gerber files for a review.
I had attached the readings for reference.ADS1256_Readings.xlsx
Can you please share your schematic and ADC configuration settings? You do not need to send the Gerber files at this time.
Have you tried running the offset and gain calibration to see if the accuracy improves? It looks like the error is pretty consistent for all of the measurements taken with a single input voltage e.g. VIN = 0V. And the average error tends to decrease at the input signal increases, so you should be able to calibrate out the error.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Bryan Lizon86:
Self calibration and system calibration are giving negative values. I will perform the test again and will provide the readout.
Please do provide a mail ID to share the schematics.
Following is the ADS1256 Init() sequence, i am performing
/* Enter the SYNC state */
// /* Wait until the ADC signals it is finished */
while(RESET == ADS1256_DRDY_Flag)
ADS1256_DRDY_Flag = RESET;
Calibration readout are in the attachment.4812.ADS1256_Readings.xlsx
In reply to kongara sridhar1:
How are you performing the calibration? It was not clear to me what data you sent in the Excel document. For the SELFCAL you should not have to short Ch 2 to ground as it says in the document. The ADC automatically shorts the inputs together internally for the offset calibration, and applies a full-scale signal from the reference voltage you apply for the gain calibration. And I wasn't clear what the table of values represented e.g. "Reset -1", "Reset -2", etc.
When you perform the SYSOCAL / SYSGCAL, are you shorting the external inputs and applying a full-scale signal, respectively? Otherwise the values you get will not be accurate, and will lead to bad results.
Do you have the buffer enabled for these measurements?
You can click on my name and select "Request friendship". This will allow you to send me the schematic offline via a private message so it will not be visible to anyone else.
As suggested, i had performed SELFCAL, with 100mV as input between Channel 1 and Ground, with input buffer OFF.
It is observed that the Offset and Gain values are not consistent during the multiple reset cycles.
I am unable to send private messages as your name is not being recognized in New message pop-up.
Readings are in the attachment.ADS1256_SELFCAL_Readings.xlsx
I believe I had to accept your friend request before you can send me messages, which I just did. So please send me the schematic offline at your earliest convenience.
Can you send the configuration settings you are using? Which is to say the example hex/binary values you are writing to the registers to configure the device?
It appears that something is wrong here as the FSC register values you are reporting (FFFFFFh) are basically at 0, when they should be around 400000h.
Also, what are you showing in the table you sent? Each column of data shows a different offset and gain value, then a list of values below. These values seem to start higher then drift to a relatively steady-state - what is this data supposed to be showing? I would expect the values to be very similar once calibration is completed, so this information does not make sense.
Inconsistency in the readings is due to the operating frequency of the SPI interface. It is set to 3 MBits/s, i had changed it to 1.5 MBits/s. Now i am able to read the registers properly.
Following is the ADC configuration i am using.
[ADS1256] Register 0 STATUS: 0x31[ADS1256] Register 1 MUX: 0x18[ADS1256] Register 2 ADCON: 0x20[ADS1256] Register 3 DRATE: 0xF0[ADS1256] Register 4 IO: 0xE1[ADS1256] Register 5 OFC0: 0xD3[ADS1256] Register 6 OFC1: 0xB6[ADS1256] Register 7 OFC2: 0xFD[ADS1256] Register 8 FSC0: 0x5F[ADS1256] Register 9 FSC1: 0x49[ADS1256] Register 10 FSC2: 0x40
With the above configuration i had taken the full scale readings but the offset is still there. I will try to SELFCAL the ADC and post the readings.
Thanks for letting me know about the SPI speed. The SCLK must be at least less than CLK / 4. So if you are using a 7.68MHz CLK, then your SCLK must be a maximum of 1.92 MHz. Using a faster SCLK will certainly cause timing issues and lead to bad data.
Let me know what you discover about performing the SELFCAL.
Also, a few comments about the schematic (I only reviewed page 3):
I am performing SELFCAL after selecting the MUX as per the channel required and i had done some filtering in the firmware to skip the sample out of range. With this, i had achieved a good accuracy as the requirement. Our Hardware team is working on finding the root cause for the offset observed with out calibration.
Readings after calibration and filtering are attached.2047.ADS1256_SELFCAL_readings.xlsx
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.