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ADS5407 Syncronization Start

Other Parts Discussed in Thread: ADS5407

Hi, There:

For ADS5407, pin name=SYNCP/N, pin number=P9/N9, since this synchronazation clock can be sourced from sampling clock CLKINP/N by dividing 32, so as soon as power is on, it starts and keeps oscillating. My question is,  which of its rising edges can be thought as "1st" rising edge that functions to reset internal clocks and digital logic? (because, only 1st rising edge has the reset function).

If during power on we want to re-synchronize, or for a certain delay time after power on, we want to start the synchronization, without using SPI function, what should we do?

Thanks.

Jason W

  • Hi,

    I have asked for clarification from the design team.  I will follow up once i find out the answer.

    Regards,

    Richard P.

  • Hi,

    The SYNCOUT is generated by an internal counter that uses the sample clock to count down a divide-by-32 function and output a SYNCOUT that repeats every 32 clock cycles.

    The counter is reset by the rising edge of SYNCIN, so if SYNCIN is itself a repeating signal with period of 32 clock cycles, then on every rising edge of SYNCIN the counter is reset by the SYNCIN, but since it is reseting the counter to the value it would already be anyway, then there is no change in the SYNCOUT signal.   Every rising edge of SYNCIN resets this counter, so what can be thought of as the 'first' or 'initial' SYNCIN is the first SYNCIN that is on a different 32-clock boundary than the previous one.  That is - any SYNCIN that changes the SYNCOUT counter can be thought of as the 'first' one and all subsequent SYNCIN rising edges don't affect the SYNCOUT if they are on multiples of 32 clocks after the 'first' one.  But in reality, every rising edge of SYNCIN is reseting the SYNCOUT counter.

    Note that SYNCIN doesn't really have to be periodic.  If SYNCIN is used to reset the counter for SYNCOUT, then there does *not* need to be any more SYNCIN rising edges.  The SYNCOUT counter will continue to count down from the sample clock and output SYNCOUT with the same 32-clock cycle pattern.  SYNCOUT will continue on without any more SYNCIN.

    Regards,

    Richard P.

  • Hi, Richard:

    Based on the answer, that means, to get SYNCIN input, instead of a periodic divide-by-32-counter sourced from CLKIN, we can use a simple one-time-rising-edge-generator ( such as a schemitt-type input gate sourced from a power supply by a certain time delay to ensure that all circuits are in stable state), and get this one-time-rising-edge connected to SYNCIN to reset all internal logic and SYNCOUT counter?

    Thanks.

    Jason W

  • Hi,

    Yes, a one-time SYNCIN would be sufficient after the ADC has had time fo power up.  Now if you are using the SYNCIN to synchronize multiple ADCs, then the SYNCIN pulse must be provided to all the ADCs at the same time and meet the setup and hold time around the sample clock edge at each ADC.

    And if you are not synchromizing multiple ADCs, or don't care about the SYNCOUT at all, then you do not need to provide a SYNCIN at all.  When we use the EVM with the TSW1400 Capture Card we do not provide a SYNCIN input.

    Regards,

    RIchard P.