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TVP5150 Data validity during Hsync, Vsync and Pixel clock

Babar Ali
Prodigy 40 points

Other Parts Discussed in Thread: TVP5150

Hello Members,

This is my first time working with video decoders (TVP5150). I am interfacing this IC with STM32f4 through DCMI port. What i wanted to know when is valid data present on TVP5150 during signals polarity of Hsync, Vsync and Pix clk. I am unable to find this in datasheet.  

  • 0
    TI__Mastermind 43875 points

    If you are using embedded sync mode then the active video regions are indicated by the SAV and EAV synchronization codes (please refer to the ITU656 specification for complete details of the standard)

    If you are using discrete sync mode then the AVID signal should be used to qualify the active video region. Please see figure 3-10 in the TVP5150 datasheet for more details.

    Please also check the following figures/sections for more information...

    Figure 3-11

    Section 3.17

    BR,

    Steve

  • 0 in reply to Steve Clynes
    Prodigy 40 points

    Steve,

    I have a question. What is the output of TVP5150 if no input video source is connected to it? What I have tested i got continuously 0x80, 0x10 . . .  till i stopped the device. Am i getting correct value? There should be random values isn't it?

  • 0 in reply to Babar Ali
    TI__Mastermind 43875 points

    If the TVP5150 detects no valid video input then it will 'free wheel' with a valid output stream which contains a black screen.

    This is necessary for some back end processors which cannot handle invalid data streams.

    BR,

    Steve