DAC38RF82EVM: how to design a proper decoupling circuit

vic zap

Part Number: DAC38RF82EVM
Other Parts Discussed in Thread: DAC38RF83

Hi!

As every paper teaches us, to properly decouple power supply pin of some chip, we should provide sufficiently low impedance in the frequency range of the current consumed by the pin. Ok! But how can we get any sort of estimated frequency distribution of demanded current?!!

Here's an example. I have a DAC. I need to decouple some power pin of the DAC so that the current consumed by that pin would not disturb the applied voltage too much to appear on the DAC output in the form of noise.

In ideal world I'd probably have some sort of current frequency distribution mask and PSRR from that pin to the output. The impedance of the decoupling circuit could easily be derived from the following condition: Zdecoup * Idistrib * PSRR < Max_Noise_Limit.

Unfortunately we're not in ideal world and we don't have Idistrib and often PSRR. Of course we have EVMs for most devices, where we can borrow needed schematic. But! Different EVMs are designed by different designers with different approaches, personal styles and components at their disposal. Therefore when you pick schematics from different EVMs, it leads to mess.

So it's much better not to pick schematics, but to understand how its components are derived.

Can you tell, please, how do you make estimations on required impedance, current distribution, etc. when designing decoupling circuits? For example, how the DAC38RF83 decoupling circuit was derived in the DAC38RF8xEVM?

Regards, Vic.

over 6 years ago

0 RJ Hopper over 6 years ago

TI__Mastermind 18095 points

Vic:

A very intuitive post. You are correct, the parameters to design the "ideal" bypass are not available. Our approach is a bit empirical/theoretical. For the DAC38RF8x device, for example, we follow the general principle of a distributed bypass approach of placing a 10 uF, 1 uF, and 0.1 uF on each of the power pins. I cannot claim that we have conducted extensive experiments to verify that is the absolute best combination; however, empirically it has proven out well. Often a question surfaces whether all of those caps on every pin is absolutely necessary. We do not explicitly have data to determine that. My guess is that our design is overkill but we often shift to the side of caution; it is easier to not place caps if desired than to add them once the design is complete.

One note with respect to bypassing on the DAC38RF8x and other RF sampling devices. It is critical to isolate the digital bypassing from the analog bypassing. If not done, digital noise flows through analog bypass caps and couples noise to the analog circuitry. We implement this isolation through ground cut-outs in the design. You can reference the EVM layout to see how the bypass caps are placed and how the ground cut-outs are implemented.

--RJH

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DAC38RF82EVM: how to design a proper decoupling circuit