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TSW1406EVM: with DAC34SH84EVM using HSDC Pro and DAC348x_GUI

Part Number: TSW1406EVM

Hello,

I am working on DAC34SH84EVM with TSW1406EVM Pattern Generator. I am trying out the Test File:  single_tone_cmplx_32768_250MSPS__BW_25.1MHZ.csv. 

The file name says sampling rate is 250MSPS, and when I enter this in the HSDC Pro, I get a peak at 25MHz on the frequency spectrum, which is expected.

On the DAC348x GUI, I select the 1x Interpolation (NCO off, QMC off) and using the external clock option, I provide a clock of 250MHz on J9 of DAC34SH84EVM and as suggested on the datasheet, I configure the CDCE62005 Drivers as follows:

Instead of 25MHz peak on the spectrum analyzer, I get 12.5MHz

When I increase the external clock to 500MHz, I get the desired peak at 25MHz:

Is this the expected performance? If the input signal is sampled at fs = X samples/sec, then is it required for the external clock to J9 be 2X Hz?

I observe the same when I change the interpolation to 2x with the same signal. With an external clock of 500MHz, I get peak at 12.5MHz and with 1GHz, I get the desired at 25MHz.

Additionally, I have the confusion about the DAC34SH84EVM user guide on the CDCE62005 divider options:

  

It says DAC clock YA is Y2 for DAC34SH84, but in the GUI (in the screenshot above) you see that FDAC is Y1. Similiarly, userguide says OSTR clock YB is Y1 for DAC34SH84, but in GUI OSTR clock is Y2.

Am I missing something here?

Thank you!

Abdullah