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ADS7953: Getting invalid data after configuring the ADC

Part Number: ADS7953

Hi,

I have been trying to configure the ADS7953 to get data for 3 channels. I send out the following messages afer startup

--0x4200 (Reset registers)

--0x3C00 (Enter Auto-2 mode with reset)

--0x9080 (Choose 2 as last channel)

--0x3800 (To get first)

--0x3800 (Previous cycle and this cycle so that the next cycle is the start of a new loop)

--0x0000(All packets after this are the message)

The problem I get though is the message that I get the following messages back in this order

0x10xx

0x18xx

0x20xx

0x28xx

0x30xx

0x38xx

0xC0xx

0xC8xx

0xD0xx

0xD8xx

0xE0xx

0xE8xx

0xF0xx

0xF8xx

Not only are the messages getting repeated. I am also getting the messages from channel D, E, F.

I am using a STM32F412 to talk to the ADS7953. I am using it in the TI mode.  The SPI is running at 2MHz clock in DMA mode. The timing diagram for the TI mode is as shown below

Any clues to what is going wrong will be helpful.

Thanks & Regards,

Nikhil

  • Hello,

    You need to program the channels to be sampled before entering the auto sampling mode.

    To do this, follow table 6 in the datasheet.  Based on this table, the command to select channel 2 would be: 1001 00 0010 000000, which is 9080, as you noted.

    After that, you can enter auto 2 mode, with the command you used: 3C00, though resetting to channel 0 is not necessary, but it is fine. After that you can simply continue in selected mode operation, as shown in table 7.

    The output will show the channel address in the first 4 bits of the output, followed by the conversion results.

    For further debugging, I suggest using an oscilloscope to visually verify that the digital communications are as expected. This will also allow to compare the output data with the expected data. I also suggest using known DC values to compare conversion data, Ch= gnd, Ch1 =1V and so on.

  • Hi Cynthia,

    What you have suggested is pretty much what I have suggested in my question.

    What will be really interesting to know is the polarity and phase of the SPI communications. This is not very well stated in the datasheet.

    Thanks,

    Nikhil

  • Nikhil,

    The timing diagram in the datasheet of the ADC should be used to determine the communication mode needed to communicate with the ADC.

    The falling edge of SCLK is where both SDI and SDO change state, thus the data should be read on the rising edge of SCLK.

    The clock polarity should be CPOL=0, and CHPA=0, thus SPI mode 0 should be used.

    If you would

    Regards

    Cynthia