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DAC80508: Can I keep DAC80508's CS line low?

Eduardo da Silva Pino
Prodigy 61 points
Part Number: DAC80508
Other Parts Discussed in Thread: DAC8568

Hi,

Is it possible to keep the DAC80508's CS low while updating all of its outputs? Or do I need to reset the CS before every new data frame?

I am asking this because I would like to write to DAC80508 via DMA transfer to the SPI TX FIFO and it would be cumbersome to have the CPU controlling the CS line for every transmit.

I have the same question regarding DAC8568ICPWR.

Best Regards,

  • 0
    TI__Guru 52663 points

    Hi Eduardo,

    The DAC80508 requires you to raise the CS line between transactions.  The device features a daisy-chain operation, meaning that it will only latch the most recent 24bits of the data that have come through the bus.

    While the DAC8568 does not feature daisy-chain operation, it still requires SYNC to have a rising edge to latch the data.  

    Thanks,

    Paul