Part Number: TSW14J56EVM
Hello all,
I am having trouble with my TSW14J56EVM revE FPGA board. I am trying to measure a signal with my ADS54J60 ADC EVM that is recommended with FPGA.
Hardware setup: I am giving 5V 5A(max limit) to both FPGA and ADC. The FPGA is connect with USB3.0 cable and the ADC is connected with mini USB2.0. The power connecters are barrels and connected through the 5V pins. The ADC is connected to FPGA with FMC connector. I am giving the data to ADC with J2 (AINP) socket.
Software setup: I am using HSDC Pro GUI v5.02 to program the FPGA and ADS54Jxx EVM GUI v1.8 to program the ADC. I am following the procedures that are described in the PDF of TI ADS54J60EVM User's Guide (Rev. A).
Issue: I am configuring the ADC as described in ADS54J60EVM User's Guide (Rev. A) (TI's original manual). After that when I opened the HSDC Pro GUI, the program recognizes the board as revD version. But the FPGA is revE version. When I continue to configure the program, it does not give any error. However, when I am trying to capture data, the program gives error as timeout.
I can describe the procedures to configure the FPGA and ADC with a more detailed way but what I am doing is already written in the manual of ADS54J60 EVM.
Ps: I have the same FPGA EVM with revD version. It works just fine when I follow the manual's steps. I can obtain data from ADC. But revE is problematic. I tried the HSDC Pro GUI to v5.15 as Jim suggested one of his posts but it didnt work.