ADS1292: daisy chain ADS1292

Part Number: ADS1292
Other Parts Discussed in Thread: ADS1299, ADS1278

Hello,

I want to use two ADS1292 synchronously. Right now, I am doing the PCB layout and I have strict requirements on the PCB size and number of layers. I am looking for ways to simplify the connections between the two ADS1292 and microcontroller.

For this I have two ideas:

- Can I share the CLK and SCLK signal?

- Can I use only one DRDY (since the two ADS1292 are synchronized (shared START pin and CLK) then the new data should always be available at the same time)? I have read in this forum that the DRDY pins of several ADS1292 cannot be connected together, but instead I could connect the first ADS1292 DRDY pin to the microprocessor and leave the second ADS1292 DRDY pin floating, right?

Thanks

  • Hi Alexis,

    Thanks for the post.

    Please refer to the diagram (Figure 34) below for the configuration of multiple ADS1292 devices. Both devices are sharing the same CLK, START, and SPI bus signals. The diagram also shows the use of a single DRDY signal for data retrieval. You will need to have separate CS for each device when sharing the SPI bus signals.

    Thanks

    -TC

  • Hi TC

    I am asking because I saw in this forum several people using several DRDY signals and saying we cannot tie together the DRDY signals (such as this one: ADS1299: ads1299. Connection 3 ADS1299 by one SPI - Data converters forum - Data converters - TI E2E support forums). I know that this post is about the ADS1299 but the ADS1299 and ADS1292 share the same "multiple device configuration" diagram (figure 34 in ADS1292 datasheet and figure 70 in ADS1299). However according to Figure34, I don't understand if  the two DRDY tied or if one is left floating?

    I also read in this post ADS1278-HT: common SCLK and CLK - Data converters forum - Data converters - TI E2E support forums that the SCLK and CLK can be shared. I know that this post is for another device but maybe the same could apply for the ADS1292?

  • Concerning the SCLK and CLK: I wan to add that according to the  attached table, the SCLK frequency can be at most roughly 15MHz

    On the other hand, equation 9  (see attached figure, I assume it is for one ADS1292, but I multiply on the right side the denominator by two to consider two ADS1292 in daisy chain) gives a minimum fSCLK.  If I suppose SCLK and CLK tied, then tsclk=tclk which in equation 9 leads to fsclk=fclk equal to at least 18.5kHz and 37kHz supposing 2 ADS1292 in daisy chain and SPS=125 and 250 respectively.

    PS: I attached the equation of ADS1299 datasheet because in ADS1292 datasheet the equations has an extra 1/72 factor which is probably an error because I don't see where this factor comes from and you give a numerical application which is correct only if using the equation in ADS1299 datasheet.

    Since fclk can be only be either 512kHz or 2048kHz, which are both inside the min-max range of fsclk, I conclude that SCLK and CLK can be tied and running either at 512kHz or 2048kHz. Is that right, or there is something I don't know that do not allow to tie them?

  • I forgot to add this about the SCLK and CLK tie idea:

    I know that the SCLK would need to be active all the time so that the CLK used by the ADC would allow continuous measurements. However I can not tie the two ADS1292 CS pin low, because I have other devices on the board that I want to discuss with using the same SPI. Thus I would like to know if the ADS1292 in daisy chain mode would allow to have the SCLK and DIN and DOUT active when the CS pin is high (that is to say when not discussing to him).

    Thanks

  • Hi Alexis,

    For the multiple device configurations (Figure 34), only one DRDY signal (Device #0) is connected to the host processor, and the other one is left floating (Device #1).   

    The ADS1292 uses the SCLK as the SPI interface serial clock to shift commands in and shift data out from the device. The SCLK does not operate continuously like the CLK signal. The ADS1292 digital interface works quite differently than the ADS1278, so you should not tie the CLK and SCLK signals together.  You will need to use the ADS1292 nCS signal in order to share the same SPI bus with other devices. There is no daisy-chain mode for ADS1292 like the one shown in Figure 70 (b) of the ADS1299 datasheet, where only a single nCS signal from the host controller is used to control both devices.  

    Sorry about the confusion for Equation 9 on the datasheet. The generalized equation should be as below, and the denominator equals 72 for ADS1292 with 24-bit and 2-channel. 

     

    Thanks

    -TC