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AIC3256 BCLK and WCLK problem

Rishabh Jain
Intellectual 810 points
Other Parts Discussed in Thread: OMAPL138

Hi All,


We are using OMAPL138 soc in our own customized board and integrating AIC3256 codec chip along with it.

We are able to detect AIC3256 device using I2C interface in our kernel-3.3.xx, by using driver provided from TI-codec downloaded from gitorious.

Our scenario is to play audio file using "aplay" command but problem we are facing is that when we are doing that we are not able to get any output at BCLK and WCLK pins of AIC3256.

AIC3256 codec chip is configured in Master mode.
MCLK is used as PLL input and is connected with crystal of 24.57 Mhz.

Please find the register settings in the attached document for PAGE-0 & PAGE-1.

Regards

Rishabh Jain

  • 0
    TI__Mastermind 46195 points

    I will get back to you soon.

    Regards,

    J-

  • 0
    TI__Mastermind 46195 points

    Hi Rishabh,

    Refer to the Appendix section of http://www.ti.com/lit/pdf/slaa404 for example configuration scripts that configure the AIC32x4 as an I2S master (i.e. BCLK and WCLK as outputs).

    Regards,

    J-

  • 0 in reply to J-
    Intellectual 810 points

    Hi J-,

    Sorry for replying late, please go ahead with my 2 questions.

    As we are using our own custom board using OMAPL138 soc and connected AIC3256 device with it.

    We are booting from Linux OS and detected AIC3256 using I2C interface as already mentioned in above post.

    Q1-
    We are using PurePath to generate *.cfg file but in default it is made according to EVM design.
    But as we our using our own custom board, what are the differences and what we need to take care while generating *.cfg file.
    Please elaborate the details as we are getting some issues in getting clocks at WCLK and BCLK.

    Q2-
    Scenario we are making *.bin file using mkcfw utility and merging it with kernel.
    When we are making *.bin file it requires 4 files as input :-
    1) reg_init.cfg
    2) pll_48kHz.cfg
    3) *.pfw (pure path framework file)
    4) *.cfg (pure path framework compiled file)

    In all the files some registers are programs and some repeatedly, so what do we do in this case as our end purpose is to run application as per our custom board.

    Note:-
    Differences might be in the crystal used in EVM and what we are using.

  • 0 in reply to Rishabh Jain
    TI__Mastermind 46195 points

    Rishabh,

    Click on the AIC3254_8x4x framework and look for the SystemSettingsCode property. There you can edit the AIC3254 configuration. For master mode, BCLK and WCLK need to be set as outputs and BCLK N divider need to be configured such that its frequency is proper. If in doubt, choose DAC_MOD_CLK as the BCLK source and N = 1. The app note describes the exact registers you need to write.

    Regards,

    J-