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Linux/TLV320AIC3104: Supply 20MHz clock to MCLK instead of 22.5792MHz

Pavel Botev
Guru**** 170625 points
Part Number: TLV320AIC3104

Tool/software: Linux

Hello Audio Codec team,


On the AM572x TI EVM we have McASP3 (slave) connected to TLV320AIC3104 (master). And we provide 22.5792MHz clock from AM572x clkout2 pin to the AIC3104 MCLK.

We have a customer that designed custom board, in which use pin mcasp3_ahclkx (instead of clkout2) to supply 20MHz to the AIC3104 MCLK. The customer is using 44100 Hz sample rate.

Could you please advice if we can change the MCLK input frequency from 22.5792MHz to 20MHz without any aic3x driver modification?

Regards,
Pavel

  • 0
    TI__Guru* 84915 points
    Hi, Pavel,

    For this case, it would be necessary to modify the driver. If the AIC3104 receives a 20MHz MCLK, it is necessary to configure the internal PLL. Basically, the clock frequencies multiple of the sample rate (in this case 11.2896MHz, 22.5792MHz) don't require PLL. The rest of frequencies do require PLL adjustment.

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    TI__Guru**** 170625 points
    Luis,

    Thanks for your answer, it is very helpful.

    I see that AM335x EVM and AM437x EVM has AIC3106 (not AIC3104) and use 12MHz clock to supply to the AIC3106 MCLK. Could you please advice if we can supply 12MHz clock to the AIC3104 MCLK to get 44100 Hz sample rate and using the default AIC3x driver?

    I see that AM335x StarterKit and AM437x StarterKit has AIC3106 (not AIC3104) and use 24MHz clock to supply to the AIC3106 MCLK. Could you please advice if we can supply 24MHz clock to the AIC3104 MCLK to get 44100 Hz sample rate and using the default AIC3x driver?

    I see that AM335x support this sample rate 44100 Hz by default and supply 12/24 MHz clock to AIC3106:
    processors.wiki.ti.com/.../AM335x_Audio_Driver's_Guide

    Regards,
    Pavel
  • 0 in reply to Pavel Botev
    TI__Guru* 84915 points
    Hi, Pavel,

    In this case, if the AIC3104 shares the same configuration/driver than the AIC3106, it could be possible to get a 44100Hz sample rate and supply 12/24MHz clock. The AIC3104 and the AIC3106 share the same PLL and clock configuration registers. So, the default driver should work to configure the sampling rate with 12 and 24 MHz (actually in our boards the exact values are 12.288MHz and 24.576MHz).

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    TI__Guru**** 170625 points

    Luis,

    Thanks for the response.

    Luis Fernando Rodríguez S. said:
    So, the default driver should work to configure the sampling rate with 12 and 24 MHz (actually in our boards the exact values are 12.288MHz and 24.576MHz).

    Do you mean that in AM335x EVM and StarterKit, we provide 12.288MHz (not 12.000MHz) and 24.576MHz (not 24.000Mhz)? Could you please provide more info on that point? In AM335x PSDK it seems to me that we provide 12.000MHz and 24.000Mhz

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    TI__Guru* 84915 points
    Hi, Pavel,

    12.288MHz and 24.576MHz are standard clock values and are commonly seen in our codecs applications. These values don't require PLL coefficients calculation since these frequencies are multiple of 48KHz (48*256 and 48*512). For 44.1KHz sampling rate, 11.2896MHz and 22.5792MHz are used.

    If 12MHz and 24MHz are used, the PLL must be configured. As the datasheet mentions, the PLL would require additional current consumption. So, our boards clocks are normally used with a 256 or 512 factor.

    Best regards,
    Luis Fernando Rodríguez S.