This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Linux/TLV320AIC3104: audio microphone has been heard extremely strong noise, sounds like a running engine, much more intensive than the signal

Part Number: TLV320AIC3104
Other Parts Discussed in Thread: TLV320AIC3105, TLV320AIC3106

Tool/software: Linux

Dear TI specialist,

We have heard a strong noise when we debug the microphone input, I have checked many links in this forum, do we have a general tutorial or procedures on how to figure out the problem?

I am attaching the schematics first, and we will dump the register map we are using later. It is highly appreciated if you can offer some suggestions.

Looking forward to your reply.

  • hello Cloud Yun,

    please attach your register configuration and Schematic and I will take a look.

    I The TLV320AIC3104 GUI does have some preset examples that you could look at. Do you have an EVM?

    If you are using the AGC, I suggest disabling it to see if the noise goes away. Additionally, you can disable the input blocks to see if the noise goes away, followed by disabling the PGA.
    This is certainly not normal function, so I surmise that there is a configuration error.

    best regards,
    -Steve Wilson
  • Hello Steve,
    Thank you for your quick response, please check our schematic first, we will dump our register map out and send you soon. Thanks.

  • Cloud Yun,

    I'm unable to see the image you attached. Can you try to post it again?
    best regards,
    -Steve Wilson
  • Hi Steve,

    Can you see it now?

  • Cloud yun,

    I still cannot see the image. Can you try a different format?

    best regards,
    -Steve Wilson
  • Page 0: 0 upto 109 reg (beyond are reserved)
    Page 1: 0 upto 76 reg (beyond are reserved.
    [TLV320AIC3104]: Page: 0 | Reg#:0 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:1 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:2 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:3 | val: 10
    [TLV320AIC3104]: Page: 0 | Reg#:4 | val: 4
    [TLV320AIC3104]: Page: 0 | Reg#:5 | val: 0New Microsoft Word Document.docx
    [TLV320AIC3104]: Page: 0 | Reg#:6 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:7 | val: a
    [TLV320AIC3104]: Page: 0 | Reg#:8 | val: f0
    [TLV320AIC3104]: Page: 0 | Reg#:9 | val: 3
    [TLV320AIC3104]: Page: 0 | Reg#:10 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:11 | val: 1
    [TLV320AIC3104]: Page: 0 | Reg#:12 | val: fa
    [TLV320AIC3104]: Page: 0 | Reg#:13 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:14 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:15 | val: 34
    [TLV320AIC3104]: Page: 0 | Reg#:16 | val: 34
    [TLV320AIC3104]: Page: 0 | Reg#:17 | val: ff
    [TLV320AIC3104]: Page: 0 | Reg#:18 | val: f4
    [TLV320AIC3104]: Page: 0 | Reg#:19 | val: 78
    [TLV320AIC3104]: Page: 0 | Reg#:20 | val: 78
    [TLV320AIC3104]: Page: 0 | Reg#:21 | val: 78
    [TLV320AIC3104]: Page: 0 | Reg#:22 | val: 7c
    [TLV320AIC3104]: Page: 0 | Reg#:23 | val: 78
    [TLV320AIC3104]: Page: 0 | Reg#:24 | val: 78
    [TLV320AIC3104]: Page: 0 | Reg#:25 | val: 46
    [TLV320AIC3104]: Page: 0 | Reg#:26 | val: 8f
    [TLV320AIC3104]: Page: 0 | Reg#:27 | val: b6
    [TLV320AIC3104]: Page: 0 | Reg#:28 | val: b6
    [TLV320AIC3104]: Page: 0 | Reg#:29 | val: 8f
    [TLV320AIC3104]: Page: 0 | Reg#:30 | val: 96
    [TLV320AIC3104]: Page: 0 | Reg#:31 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:32 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:33 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:34 | val: 7f
    [TLV320AIC3104]: Page: 0 | Reg#:35 | val: 7f
    [TLV320AIC3104]: Page: 0 | Reg#:36 | val: 14
    [TLV320AIC3104]: Page: 0 | Reg#:37 | val: c0
    [TLV320AIC3104]: Page: 0 | Reg#:38 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:39 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:40 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:41 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:42 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:43 | val: 2f
    [TLV320AIC3104]: Page: 0 | Reg#:44 | val: 2f
    [TLV320AIC3104]: Page: 0 | Reg#:45 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:46 | val: 2f
    [TLV320AIC3104]: Page: 0 | Reg#:47 | val: af
    [TLV320AIC3104]: Page: 0 | Reg#:48 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:49 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:50 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:51 | val: f
    [TLV320AIC3104]: Page: 0 | Reg#:52 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:53 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:54 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:55 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:56 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:57 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:58 | val: 6
    [TLV320AIC3104]: Page: 0 | Reg#:59 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:60 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:61 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:62 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:63 | val: 2f
    [TLV320AIC3104]: Page: 0 | Reg#:64 | val: af
    [TLV320AIC3104]: Page: 0 | Reg#:65 | val: f
    [TLV320AIC3104]: Page: 0 | Reg#:66 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:67 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:68 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:69 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:70 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:71 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:72 | val: 6
    [TLV320AIC3104]: Page: 0 | Reg#:73 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:74 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:75 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:76 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:77 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:78 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:79 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:80 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:81 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:82 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:83 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:84 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:85 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:86 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:87 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:88 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:89 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:90 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:91 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:92 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:93 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:94 | val: c6
    [TLV320AIC3104]: Page: 0 | Reg#:95 | val: c
    [TLV320AIC3104]: Page: 0 | Reg#:96 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:97 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:98 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:99 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:100 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:101 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:102 | val: 2
    [TLV320AIC3104]: Page: 0 | Reg#:103 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:104 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:105 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:106 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:107 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:108 | val: 0
    [TLV320AIC3104]: Page: 0 | Reg#:109 | val: 0

    [TLV320AIC3104]: Page: 1 | Reg#:0 | val: 1
    [TLV320AIC3104]: Page: 1 | Reg#:1 | val: 6b
    [TLV320AIC3104]: Page: 1 | Reg#:2 | val: e3
    [TLV320AIC3104]: Page: 1 | Reg#:3 | val: 96
    [TLV320AIC3104]: Page: 1 | Reg#:4 | val: 66
    [TLV320AIC3104]: Page: 1 | Reg#:5 | val: 67
    [TLV320AIC3104]: Page: 1 | Reg#:6 | val: 5d
    [TLV320AIC3104]: Page: 1 | Reg#:7 | val: 6b
    [TLV320AIC3104]: Page: 1 | Reg#:8 | val: e3
    [TLV320AIC3104]: Page: 1 | Reg#:9 | val: 96
    [TLV320AIC3104]: Page: 1 | Reg#:10 | val: 66
    [TLV320AIC3104]: Page: 1 | Reg#:11 | val: 67
    [TLV320AIC3104]: Page: 1 | Reg#:12 | val: 5d
    [TLV320AIC3104]: Page: 1 | Reg#:13 | val: 7d
    [TLV320AIC3104]: Page: 1 | Reg#:14 | val: 83
    [TLV320AIC3104]: Page: 1 | Reg#:15 | val: 84
    [TLV320AIC3104]: Page: 1 | Reg#:16 | val: ee
    [TLV320AIC3104]: Page: 1 | Reg#:17 | val: 7d
    [TLV320AIC3104]: Page: 1 | Reg#:18 | val: 83
    [TLV320AIC3104]: Page: 1 | Reg#:19 | val: 84
    [TLV320AIC3104]: Page: 1 | Reg#:20 | val: ee
    [TLV320AIC3104]: Page: 1 | Reg#:21 | val: 39
    [TLV320AIC3104]: Page: 1 | Reg#:22 | val: 55
    [TLV320AIC3104]: Page: 1 | Reg#:23 | val: f3
    [TLV320AIC3104]: Page: 1 | Reg#:24 | val: 2d
    [TLV320AIC3104]: Page: 1 | Reg#:25 | val: 53
    [TLV320AIC3104]: Page: 1 | Reg#:26 | val: 7e
    [TLV320AIC3104]: Page: 1 | Reg#:27 | val: 6b
    [TLV320AIC3104]: Page: 1 | Reg#:28 | val: e3
    [TLV320AIC3104]: Page: 1 | Reg#:29 | val: 96
    [TLV320AIC3104]: Page: 1 | Reg#:30 | val: 66
    [TLV320AIC3104]: Page: 1 | Reg#:31 | val: 67
    [TLV320AIC3104]: Page: 1 | Reg#:32 | val: 5d
    [TLV320AIC3104]: Page: 1 | Reg#:33 | val: 6b
    [TLV320AIC3104]: Page: 1 | Reg#:34 | val: e3
    [TLV320AIC3104]: Page: 1 | Reg#:35 | val: 96
    [TLV320AIC3104]: Page: 1 | Reg#:36 | val: 66
    [TLV320AIC3104]: Page: 1 | Reg#:37 | val: 67
    [TLV320AIC3104]: Page: 1 | Reg#:38 | val: 5d
    [TLV320AIC3104]: Page: 1 | Reg#:39 | val: 7d
    [TLV320AIC3104]: Page: 1 | Reg#:40 | val: 83
    [TLV320AIC3104]: Page: 1 | Reg#:41 | val: 84
    [TLV320AIC3104]: Page: 1 | Reg#:42 | val: ee
    [TLV320AIC3104]: Page: 1 | Reg#:43 | val: 7d
    [TLV320AIC3104]: Page: 1 | Reg#:44 | val: 83
    [TLV320AIC3104]: Page: 1 | Reg#:45 | val: 84
    [TLV320AIC3104]: Page: 1 | Reg#:46 | val: ee
    [TLV320AIC3104]: Page: 1 | Reg#:47 | val: 39
    [TLV320AIC3104]: Page: 1 | Reg#:48 | val: 55
    [TLV320AIC3104]: Page: 1 | Reg#:49 | val: f3
    [TLV320AIC3104]: Page: 1 | Reg#:50 | val: 2d
    [TLV320AIC3104]: Page: 1 | Reg#:51 | val: 53
    [TLV320AIC3104]: Page: 1 | Reg#:52 | val: 7e
    [TLV320AIC3104]: Page: 1 | Reg#:53 | val: 7f
    [TLV320AIC3104]: Page: 1 | Reg#:54 | val: ff
    [TLV320AIC3104]: Page: 1 | Reg#:55 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:56 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:57 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:58 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:59 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:60 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:61 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:62 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:63 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:64 | val: 0
    [TLV320AIC3104]: Page: 1 | Reg#:65 | val: 7f
    [TLV320AIC3104]: Page: 1 | Reg#:66 | val: ea
    [TLV320AIC3104]: Page: 1 | Reg#:67 | val: 80
    [TLV320AIC3104]: Page: 1 | Reg#:68 | val: 16
    [TLV320AIC3104]: Page: 1 | Reg#:69 | val: 7f
    [TLV320AIC3104]: Page: 1 | Reg#:70 | val: d5
    [TLV320AIC3104]: Page: 1 | Reg#:71 | val: 7f
    [TLV320AIC3104]: Page: 1 | Reg#:72 | val: ea
    [TLV320AIC3104]: Page: 1 | Reg#:73 | val: 80
    [TLV320AIC3104]: Page: 1 | Reg#:74 | val: 16
    [TLV320AIC3104]: Page: 1 | Reg#:75 | val: 7f
    [TLV320AIC3104]: Page: 1 | Reg#:76 | val: d5
     
     
  • Hi Steve,

    We seem to have found part of the problem, as our schematic design, we use mono output.  The software is expecting stereo output from the TLV320AIC3104, can you help to check whether we can still give out a stereo output?

    7635.schematic.pdf

  • Cloud Yun,

    I am not sure I understand. are you talking about the I2S Out?

    -Steve Wilson
  • Hi Steve,

    Yes, my concern is the I2S digital output channel, could we output stereo based on the current schematic?

  • Cloud Yun,

    The I2S output for your device should be Stereo, but the Left channel will have all zeros. it is not possible on the AIC3104 to route MIC2R to the Left ADC.

    It is possible to set the dac data path to play a mono mix of the LEft and right Data channels, but it doesn't sound like that will help you.

    One thing that might help.... It looks like you are not using the Line1LM, Line1LP, line1RM, and line1RP inputs. is that correct?

    because if you used the TLV320AIC3105, your input routing capabilities are greater. aside from the inputs the AIC3104 and AIC3105 are very similar and the pinout is the same for everything but the inputs.

    best regards,
    -Steve wilson
  • Hi Steve,

    It seems that Register 17/18 has a configuration to enable you to route our mono input of MIC2R to the left ADC as well, but the diagram shows there is no path for this implementation, does the register value designed for other parts of the same family such as  TLV320AIC3106 which enables mono input to route to both left ADC and right ADC? It doesn't seem to be possible to generate a stereo output for the microphone based on our current schematic. 
    Yes, we don't use Line1LM, Line1LP, line1RM, and line1RP inputs in the current design, can we use it again by some modification such as inserting a capcitor?
    In your suggestion, we could migrate TLV320AIC3105 without any hardware modification, is that right? What are the differences of inputs you mentioned? Could you elaborate more?
  • Cloud Yun,

    Yes,  The AIC3104 is amember of the same family as the AIC3106.  Register17/18 in the datasheet are likely copyover errors.  You are welcome to confirm this.

    The TLV320AIC3105 has the same input routing (including bypass paths) as the TLV320AIC3106 but they are all single-ended inputs.  The rest of the functionality is identical to the AIC3104.  see figures below:

    Best regards. 

    -Steve Wilson

  • Hi Steve,

    Is it possible to make use of the PIN14 of TLV320AIC3104 by making it as MIC2L signal to drive left ADC instead of taking it as MICDET?

    Does the functionality difference of  MIC2L or MICDETonly come from AC coupled or DC coupled? 

  • Cloud Yun,

    it is possible to DC couple into the AIC3104, but you would need to level shift your input, and you would need to change the gain to match the input range of the ADC. it would be more straitforward to simply redo the schematic, or use the AIC3105.

    best regards,
    -Steve Wilson
  • Hi Steve,

    Thanks for your clarification.
    Could you share a schematic example of DC couple input to AIC3104? I will check whether we will have plan to redo the schematic design.
  • Cloud Yun, I do not have an example Schematic specific to the AIC3104 as It is not a recommended use case. Any voltage offset could be very problematic and would limit the use of the PGA. If you do not have a specific reason for DC coupling (Such as measuring DC voltages) I recommend avoiding it.

    best regards,
    -Steve Wilson
  • Hi Steve,

    Thank you for your support, we have figured out the previous problem of MIC input in software.

    Now we are focusing on the speaker, can we loop the DOUT to DIN directly from the system feasibility perspective? I have implemented that, but found that the noise is much stronger than the signal, could you share some practical register configuration based on our schematic,  two channels with the single output of HPLOUT and HPROUT.

    Best regards,

  • Cloud Yun,

    The DOUT can be directly routed to DIN, and there should be no noise issue. I have done this countless times and never had an issue.  There would be an issue if you had a external data source providing data to DIN as well.

    the GUI can be used to help you create a configuration.  There are preset configurations for routing.  you may still need to configure your PLL or CLKDIV etc... but the routing should be good.

    Stereo playback to AC coupled Headphone Outputs:

    w 30 07 8A

    w 30 29 02

    w 30 2B 00

    w 30 0E C0

    w 30 25 E0

    w 30 26 10

    w 30 2F 80

    w 30 40 80

    w 30 41 0D

    w 30 33 0D

    For the Input side of things, I modified the preset "on board microphone to digital output".  The GUI has a typo and says this config uses mic3L/R.  But as you know, the TLV320AIC3104 does not have Mic3L/R inputs.  since you are only using the Mic2R input I have routed it to both Left and right ADC,  but you can choose one and delete the other, or use both.  

    w 30 11 F0 # route mic2R to Left ADC PGA mix

    w 30 12 F0 # Route mic2R to Right ADC PGA mix

    w 30 16 7C # power up right ADC

    w 30 13 7C # power up LEFT ADC

    w 30 0F 00 # unmute LEFt ADC PGA, pga gain = 0dB

    w 30 10 00 # unmute Right ADC PGA, PGA gain = 0dB

    w 30 19 80 # mic bias = 2.5V.

    I have also attached a functional block diagram that includes register numbers for each block.  This document can be very helpful in helping to plan out the configuration.

    best regards.

    -Steve Wilson

    TLV320AIC3104_Functional_block_Diagram_With_Registers.pdf

  • Hi Steve,

    Thanks for your guidance. I think the main item I lost was the register 14 0f AC output coupled, I modified all the register configurations based on your configuration (mute the left channel and use the right channel)and read them out, please point out if I make any mistake. 
    After configuring with these settings, the problem is still here-- I can hear constant strong harsh background noise. What might be the reason from your experience?


    just supplement the environment, I use the same I2S interface, that is to say, Both DOUT and DIN are driven or captured by the same WCLK and BCLK, I shorted the DOUT to DIN in a Xilinx FPGA. Do you have any suspicion towards this implementation? Thanks.
  • Cloud Yun,

    can you explain what you mean by "I shorted the DOUT to DIN in a Xilinx FPGA"?

    When I am shorting the Dout of the AIC3104 to the DIN of the AIC3104, I am just shorting the pins together. Can you get a scope capture of the DIN? with WCLK and BCLK?

    -Steve
  • Hi Steve,

    We have both DOUT and DIN routed to a Xilinx FPGA pin, in order to make a stable and reliable connection, I just shorted the PIN without any register pipeline, the overall delay is only 4.534ns, I am assuming it doesn't matter too much for a 48KHz signal, equivalent to shorting directly, unless you have a different opinion in terms of noise introduction.

    What do you expect for a "good" waveform or a "bad" waveform respectively? Do you have a "good" waveform to refer to?

  • Cloud yun,

    The expected I2S data/Clock waveforms are in the datasheet.  I have attached  scope shots of a 1khz test tone on the HPROUT of the AIC3104.  

    The first scope shot is from TP26.  This is an unfiltered output.  The Second scope shot is from TP33.  There is a passive LPF on this output to reduce out of band noise. 

    Best regards, 

    -Steve Wilson

  • Hi Steve,

    It  seems that the testing point is HPRCOM rather than HPROUT.

    Does your testing result come from your golden reference board? How should we generate 1khz test tone to get a similar testing result as you did?

    Besides, we see in our case, if we adjust the ADC volume a bit lower, the noise of speaker has been sort of faded, do you think the input volume is still another factor causes noise if we short DOUT to DIN?

    Thanks,

    Cloud 

  • Cloud Yun,

    This testing result came from our EVM, I'm not sure I would call it a "golden reference board" but it is designed with all of the layout considerations described in the datasheet.
    my test tone was generated with program on my PC and the EVM was used to bridge USB to the codec. Any I2S output source would be acceptable. do you have access to an AP?

    using the input PGA will definitely add some noise. try muting the PGA and see if the Noise goes away.

    best regards,
    -Steve Wilson
  • Cloud Yun,

    I wonder if you can update me on the status of this issue? Has the noise problem been resolved?

    -Steve