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ADS54J60: ADS54J60 > LMK04828 settings

Rahul chakrawal
Prodigy 60 points
Part Number: ADS54J60
Other Parts Discussed in Thread: LMK04828

Hi,

 I am trying to configure ADC_JESD bank registers (6800h 6900h, 6A00h ) through SPI communication as given in datasheet, but I not able read back the registers which i have configured of this bank registers. I am following Table 65. Initialization Sequence from "ADS54J60 SBAS706C –APRIL 2015–REVISED JANUARY 2017" datasheet.

Although, I am able write and read for Analog bank register by following the 8.4.1.2 Serial Register Write: Analog Bank and 8.4.1.3 Serial Register Readout: Analog Bank points from "ADS54J60 SBAS706C –APRIL 2015–REVISED JANUARY 2017" datasheet.

Could you please give me some suggestion to how to do write on the JESD bank register using spi communication.

  • 0
    TI__Guru* 91947 points

    Rahul,

    You must first do a digital reset before you can access these registers. Do this by writing a 0x01 then a 0x00 to address 0x6800 in the main digital page. Also, you must have the device clock and SYSREF running to do these reads.

    Regards,

    Jim 

  • 0 in reply to jim s
    Prodigy 60 points
    Hi

    I am trying to configure LMK04828 with DCLKout2 = 100 MHz and SDCLKOut3 = 150 MHz. But I am not getting SDCLKOut3. Below is the register configuration that I am using.


    0x000090
    0x000000
    0x000200
    0x010003
    0x010155
    0x010301
    0x010402
    0x010500
    0x010689
    0x010700
    0x010818
    0x010955
    0x010B00
    0x010C22
    0x010D00
    0x010E00
    0x010F66
    0x011008
    0x011155
    0x011300
    0x011402
    0x011500
    0x011689
    0x011700
    0x011818
    0x011955
    0x011B00
    0x011C02
    0x011D00
    0x011E89
    0x011F00
    0x012008
    0x012155
    0x012300
    0x012402
    0x012500
    0x012689
    0x012700
    0x012808
    0x012955
    0x012B00
    0x012C02
    0x012D00
    0x012E89
    0x012F00
    0x013006
    0x013155
    0x013300
    0x013402
    0x013500
    0x013689
    0x013700
    0x013808
    0x013903
    0x013A00
    0x013B10
    0x013C00
    0x013D08
    0x013E03
    0x013F00
    0x014001
    0x014100
    0x014200
    0x014301
    0x014400
    0x01457F
    0x014607
    0x01471A
    0x014833
    0x01491B
    0x014A02
    0x014B16
    0x014C00
    0x014D00
    0x014EC0
    0x014F7F
    0x015001
    0x015102
    0x015200
    0x015300
    0x015478
    0x015500
    0x015601
    0x015700
    0x015896
    0x015900
    0x015A78
    0x015BD4
    0x015C20
    0x015D00
    0x015E00
    0x015F0B
    0x016000
    0x01610A
    0x016289
    0x016300
    0x016400
    0x01650C
    0x017C15
    0x017D33
    0x016600
    0x016700
    0x01680F
    0x016959
    0x016A20
    0x016B00
    0x016C00
    0x016D01
    0x016E13
    0x017300
    0x1FFD00
    0x1FFE00
    0x1FFF53

    In the above data bits(23 : 8) = address of register and bits(7:0) = data bits. Please help me to configure.


    Thanks and Regards
    Rahul
  • 0 in reply to Rahul chakrawal
    TI__Genius 9920 points
    Hi Rahul,
    You generate 150 MHz from SDCLKOut3 SYSREF path. So the 150 MHz register operation need follow up the steps in LMK04828 datasheet "9.3.2.1.1 Setup of SYSREF Example". That's an example for pulse SYSREF generation. If we select continuous mode, step 5 should be selected correctly, and ignore step 6. Others pulse mode related circuits also could be powered down, as your current setting.

    The key is
    to recover SYNC_POL = 0, and SYNC_DIS2 = 1, SYNC_DISSYSREF = 1 (0x014482). Refer to step 2.(e) and step 3.


    If the 150 MHz could be output from DCLKOut4, we could ignore SYSREF operation, just like DCLKOUT2 2400 MHz / DIV 24 = 100 MHz,
    2400 MHz / DIV 16 = 150 MHz. It is more easy for register programming.

    Hope it helpful for your debug.

    Regards,
    Shawn