CCS/PGA411-Q1: what may cause the bits of register "DEV_STAT 4" error?

Mark,

SFAULT will be set to 1 if a fault occurs. When SFAULT is 1, the FAULT pin will be Hi-Z, indicating a fault. If the ABISTF fault is flagged, that would cause SFAULT to be high as well.

ABISTF occurs if ABIST does not complete successfully. This can occur in a number of ways:
- ABIST runs during every power-up, but it can also be manually run by setting ABIST_EN. If ABIST_EN is set by the user, but then DIAGEXIT is immediately set without allowing ABIST to complete, ABISTF can occur.
- ABISTF is designed to double check many of the fault diagnostics, so if the PGA411-Q1 is damaged, ABISTF may detect it.

I will run a few more tests this week to double check which board states during power-up might also cause ABISTF. Can you give me a few more details about your set-up?
- Are you using the EVM?
- Have you modified the EVM/connected anything to it?
- Have you programmed the EEPROM on the EVM?

Thanks,

-Clancy

I don't use EVM, and OUTA/OUTB/OUTZ, sometimes maybe error as well