No source available for "0x8805c" in the CCS debug mode

#include "msp430f5529.h"
#include <stdint.h>                                                // Hardware-related definitions
#include "Uart_Driver.h"
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <msp430.h>

/// PIN 3.3 UART TX
/// PIN 3.4 UART RX

uint8_t rxBuffer[1];
uint8_t txPkt[1] = {0x0f};
uint8_t rxData[1];

int rx_cnt=0;
int GPIO_cnt =0;
int pktLength = 1;  // how many bit legnth
int counter =0;

static receive_event_handler _RxEventHandle;

void data_receive_handle2(uint8_t *data,uint8_t len) {
	rxBuffer[0] = *data;
	if(GPIO_cnt<pktLength)
	{
		//TODO: deal with the data
		GPIO_cnt++;
	}

	else if(GPIO_cnt>=pktLength)
	{
		GPIO_cnt=0;
		//UCA0IE &= ~UCRXIE; //Disable USCI_A0 RX interrupt
	}
}

void data_interface_init(receive_event_handler OnRxEventHandle) {
	_RxEventHandle = OnRxEventHandle;
    P3SEL |= BIT3+BIT4;	//P3.3 3.4

    P3OUT &= ~BIT3;	//pull down
    P3DIR &= ~BIT3;

    //P4SEL |= BIT4+BIT5; // P4.4,4.5option select								   //6/17 p3.4 p3.3
    UCA0CTL1 |= UCSWRST;                      // **Put state machine in reset**    //6/17 UCA1->UCA0
    UCA0CTL0 &= ~UC7BIT ; // 8 bits, no parity, 1 stop bit						   //6/17 UCA1->UCA0
    UCA0CTL0 = UCMODE_0;  // UART												   //6/17 UCA1->UCA0
    UCA0CTL1 |= UCSSEL_2; // SMCLK							                       //6/17 UCA1->UCA0

    UCA0BR0  = 0x64;	//25MHz clk, BR = 1.2k
	UCA0BR1  = 0x51;	//25MHz clk, BR = 1.2k
	UCA0MCTL = 0x92;	//25MHz clk, BR = 1.2k

    UCA0MCTL |= UCBRS_1 + UCBRF_0; // added from website, Modulation UCBRSx=1, UCBRFx=0
    UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**					   //6/17 UCA1->UCA0
	UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt							   //6/17 UCA1->UCA0

}

void system_init(void) {

  WDTCTL = WDTPW + WDTHOLD; // Stop Watchdog Timer

  TBCCTL0 = CCIE; // TBCCR0 interrupt enabled
  TBCCR0 = 10550;  //Capture/Compare register value,for MSP430 B
  TBCTL = TBSSEL_2 + MC_1 + TBCLR; // SMCLK, upmode, clear TBR:TB0 interrupt freq = 25M/10000 = 2.5k

  UCSCTL3 = SELREF_2;                       // Set DCO FLL reference = REFO, div by 1
  UCSCTL4 |= SELA_2;               			// Set ACLK = REFO, SMCLK = DCOCLKDIV(default SELS_4)

  P2SEL |= BIT2;							//set p2.2 as peripheral SMCLK
  P2DIR |= BIT2;							//set p2.2 as peripheral SMCLK

  __bis_SR_register(SCG0);                  // Disable the FLL control loop
  UCSCTL0 = 0x0000;                         // Set lowest possible DCOx, MODx
  UCSCTL1 = DCORSEL_7;                      // Select DCO range 50MHz operation
  UCSCTL2 = FLLD_0 + 762;                   // Set DCO Multiplier for 25MHz
                                            // FLLD_0 + FLLN, (N + 1) * FLLRef = Fdco, N is 10-bit length and hence range = 0~1023
                                            // (762 + 1) * 32768 = 25MHz
                                            // Set FLL Div = fDCOCLK/2

  __bic_SR_register(SCG0);                  // Enable the FLL control loop

  // Worst-case settling time for the DCO when the DCO range bits have been
  // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
  // UG for optimization.
  // 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle
  __delay_cycles(782000);

  // Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize
  do
  {
    UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);  // Clear XT2,XT1,DCO fault flags
    SFRIFG1 &= ~OFIFG;                           // Clear fault flags
  }while (SFRIFG1&OFIFG);                        // Test oscillator fault flag
}



/** brief Transmit data to UART **/
void data_transmit(uint8_t *s, uint8_t len) {
	while (len--) {
       while (!(UCA0IFG&UCTXIFG));
	    UCA0TXBUF = *s++;
	}
}

#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void){
  volatile unsigned int i;
	P4OUT ^= BIT7;	//toggle
	cnt_rx = cnt_rx+1;
  switch(__even_in_range(UCA0IV,4)){
    case 0: break;                          // Vector 0 - no interrupt
    case 2:                                 // Vector 2 - RXIFG
    	if (_RxEventHandle != NULL) {
    		_RxEventHandle((uint8_t *) &UCA0RXBUF, 1);
    	}
      break;
    case 4:                  // Vector 4 - TXIFG
     break;
    default: {
    	break;
    }
  }
}


//=================main===========================
 int main(void) {
	P1SEL &= (~BIT4);             // Set P1.4    SEL as  GPIO
	P1DIR |=  BIT4;               // P1.4 output the rest
	P1OUT &= ~BIT4;

	__enable_interrupt();//enable interrupts
	system_init();
	data_interface_init(data_receive_handle2);

	while(1){
		if(counter == 2500){
			data_transmit( txPkt, 1) ;
		}
	}
}


#pragma vector=TIMER0_B0_VECTOR
__interrupt void Timer_B (void)	//TB0 interrupt freq = 25M/10000 = 2.5k
{
	counter ++;
	if(counter >= 2500){
		P1OUT ^= BIT4;             // DEBUG
		counter = 0;
	}
}