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TMS570 (TMS570LS20216): Linker generated ECC issue

Other Parts Discussed in Thread: TMS570LS20216, NOWECC

My linker script is based on the wiki at http://processors.wiki.ti.com/index.php/Linker_Generated_ECC but there's a note there stating that the ECC algorithm sections "...is yet not verified"  for the TMS570LS20x/10x. Also the section named example Memory Map for TMS570LS20216 is empty, so it isn't of much help.

Anyway, when I debug the Debug project I'm able to step through the code to a certain point when the stack shows that the "entry point" has been reached and I'm unable to continue stepping through the code. My guess is that the issue is related with handling interrupts and possibly something to do with the ECC algorithm section in the linker script below. 

Are there any issues with the linker script below that could be causing this? Also can somebody verify that the ECC section is correct? I have a hunch that the hamming_mask should be FMC, but I haven't been able to find this anywhere in the documentation.

Note that this is a working project using nowECC, and the issues I'm having are while trying to generate the ECC data via the linker.

My tool versions are:
Code Composer Studio Version: 6.0.0.00190
Hercules Emulation 6.0.2

sys_link.cmd:

// Address of Flash ECC region
#define FLASH_ECC_ORIGIN  (0x00400000)

MEMORY
{
    STACKS  (RW) : origin=0x08000000 length=0x00001500
    RAM     (RW) : origin=0x08001500 length=0x00026B00

    // Embedded Flash (F035) with vfill specifier, used for ECC generation
    VECTORS (X)  : origin=0x00000000 length=0x00000020  fill=0xFFFFFFFF
    FLASH0  (RX) : origin=0x00000020 length=0x0007FFE0 vfill=0xFFFFFFFF
    FLASH1  (RX) : origin=0x00080000 length=0x00080000 vfill=0xFFFFFFFF
    FLASH2  (RX) : origin=0x00100000 length=0x00080000 vfill=0xFFFFFFFF
    FLASH3  (RX) : origin=0x00180000 length=0x00080000 vfill=0xFFFFFFFF

    // ECC sections
    ECC_VEC      : origin = (FLASH_ECC_ORIGIN+(start(VECTORS)>>1))
    			   length = (size(VECTORS)>>1)
    			   ECC = {input_range=VECTORS}

    ECC_FLA0     : origin = (FLASH_ECC_ORIGIN+(start(FLASH0)>>1))
                   length = (size(FLASH0)>>1)
                   ECC = {input_range=FLASH0}

    ECC_FLA1     : origin = (FLASH_ECC_ORIGIN+(start(FLASH1)>>1))
                   length = (size(FLASH1)>>1)
                   ECC = {input_range=FLASH1}

    ECC_FLA2     : origin = (FLASH_ECC_ORIGIN+(start(FLASH2)>>1))
                   length = (size(FLASH2)>>1)
                   ECC = {input_range=FLASH2}

    ECC_FLA3     : origin = (FLASH_ECC_ORIGIN+(start(FLASH3)>>1))
                   length = (size(FLASH3)>>1)
                   ECC = {input_range=FLASH3}

}

ECC
{
    algoR4F035 : address_mask = 0x003ffff8 /* Address Bits 21:3 See spnu489c.pdf, p279 */
                 hamming_mask = R4         /* Use the built-in R4 mask */
                 parity_mask  = 0x0c       /* Set which ECC bits are even/odd parity (spnu489c.pdf, Table 8-4) */
                 mirroring    = F035       /* TMS570 are built with F035 */
}

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0
    .const   : {} > FLASH0
    .cinit   : {} > FLASH0
    .pinit   : {} > FLASH0
    .bss     : {} > RAM
    .data    : {} > RAM

}

  • Hi Jairo,

    I tried generating the ECC for the TMS570LS20216 with the also I wrote on the Wiki and the memory map you used and it works fine for me.
    Please see the attached CCS 6.0.0 project, and the Linker Command File I used.

    Best Regards,
    Christian

    /*----------------------------------------------------------------------------*/
    /* sys_link.cmd */
    /* */
    /* (c) Texas Instruments 2009-2013, All rights reserved. */
    /* */


    /* USER CODE BEGIN (0) */
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Linker Settings */

    --retain="*(.intvecs)"

    /* USER CODE BEGIN (1) */

    // Address of Flash ECC region
    #define FLASH_ECC_ORIGIN (0x00400000)

    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Memory Map */

    MEMORY
    {
    VECTORS (X) : origin=0x00000000 length=0x00000020 fill=0xFFFFFFFF
    FLASH0 (RX) : origin=0x00000020 length=0x0007FFE0 vfill=0xFFFFFFFF
    FLASH1 (RX) : origin=0x00080000 length=0x00080000 vfill=0xFFFFFFFF
    FLASH2 (RX) : origin=0x00100000 length=0x00080000 vfill=0xFFFFFFFF
    FLASH3 (RX) : origin=0x00180000 length=0x00080000 vfill=0xFFFFFFFF
    STACKS (RW) : origin=0x08000000 length=0x00001500
    RAM (RW) : origin=0x08001500 length=0x00026B00

    /* USER CODE BEGIN (2) */
    // ECC sections
    ECC_VEC : origin = (FLASH_ECC_ORIGIN+(start(VECTORS)>>1))
    length = (size(VECTORS)>>1)
    ECC = {input_range=VECTORS}

    ECC_FLA0 : origin = (FLASH_ECC_ORIGIN+(start(FLASH0)>>1))
    length = (size(FLASH0)>>1)
    ECC = {input_range=FLASH0}

    ECC_FLA1 : origin = (FLASH_ECC_ORIGIN+(start(FLASH1)>>1))
    length = (size(FLASH1)>>1)
    ECC = {input_range=FLASH1}

    ECC_FLA2 : origin = (FLASH_ECC_ORIGIN+(start(FLASH2)>>1))
    length = (size(FLASH2)>>1)
    ECC = {input_range=FLASH2}

    ECC_FLA3 : origin = (FLASH_ECC_ORIGIN+(start(FLASH3)>>1))
    length = (size(FLASH3)>>1)
    ECC = {input_range=FLASH3}
    /* USER CODE END */
    }

    /* USER CODE BEGIN (3) */
    ECC
    {
    algoR4F035 : address_mask = 0x003ffff8 /* Address Bits 21:3 See spnu489c.pdf, p279 */
    hamming_mask = R4 /* Use the built-in R4 mask */
    parity_mask = 0x0c /* Set which ECC bits are even/odd parity (spnu489c.pdf, Table 8-4) */
    mirroring = F035 /* TMS570 are built with F035 */
    }
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Section Configuration */

    SECTIONS
    {
    .intvecs : {} > VECTORS
    .text : {} palign(8) > FLASH0 | FLASH1 | FLASH2 | FLASH3
    .const : {} palign(8) > FLASH0 | FLASH1 | FLASH2 | FLASH3
    .cinit : {} palign(8) > FLASH0 | FLASH1 | FLASH2 | FLASH3
    .pinit : {} palign(8) > FLASH0 | FLASH1 | FLASH2 | FLASH3
    .bss : {} > RAM
    .data : {} > RAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (5) */
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Misc */

    /* USER CODE BEGIN (6) */
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/

    ECC_Test.zip
  • Thanks for looking into this. It turns out that it was working all along and that the compiler optimization (-O2) was preventing execution of the interrupt handler (I didn't look for the root cause of this).  Turning off optimizations on the build fixed the issue. Regardless, it was helpful to get verification of the linker script.  Thanks again!

  • How to generate the ECC file?

  • i mean to say, i configured the Linker command to generate the ECC for RM46 controller.

    but my question is ,

    What is procedure or steps to get the ECC file out in CCS ?

    IS the memory read only option OR is there any setting in CCS so that i can look the ECC file OR its data?
  • Please see the article Linker Generated ECC.

    Thanks and regards,

    -George

  • Thank you for response. it helps me.