This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Compiler/TMS320F280049: CLA compiler adds MMOVIZ instruction for 16-bit write

Part Number: TMS320F280049

Tool/software: TI C/C++ Compiler

Hi there,

I wonder, why CLA compiler translates 16-bit constant write (like EPwm1Regs.AQCTLA.all = my_constant) into sequence:

MMOVIZ MR0, #0

MMOVXI MR0, #my_constant

MMOV16 @_EPwm1Regs+64,MR0

If write operation is 16-bit wide anyway what's the reason to zero out upper half of register?

  • For this expression ...

    Dmitry Sharihin said:
    EPwm1Regs.AQCTLA.all = my_constant

    Please show the declaration of "all" and "my_constant".. With that, we should be able to construct a small test case that generates the same assembly sequence, and then explain it.

    Thanks and regards,

    -George

  • Hello, George

    /** \brief Test code for CLA compiler, marked as __attribute__((interrupt)) in header file */
    void inverter_clainit(void) {
        EPwm1Regs.AQCTLA.all = (1 << 8);
    }

    Where AQCTLA is 

    struct AQCTLA_BITS {                    // bits description
        uint16_t ZRO:2;                       // 1:0 Action Counter = Zero
        uint16_t PRD:2;                       // 3:2 Action Counter = Period
        uint16_t CAU:2;                       // 5:4 Action Counter = Compare A Up
        uint16_t CAD:2;                       // 7:6 Action Counter = Compare A Down
        uint16_t CBU:2;                       // 9:8 Action Counter = Compare B Up
        uint16_t CBD:2;                       // 11:10 Action Counter = Compare B Down
        uint16_t rsvd1:4;                     // 15:12 Reserved
    };
    
    union AQCTLA_REG {
        uint16_t  all;
        struct  AQCTLA_BITS  bit;
    };

    This structure is part of F28004x Device Support Library, so I've attached file f28004x_epwm.h where this struct is defined.f28004x_epwm.h

    Generated assembly code looks like this:

    ;***************************************************************
    ;* TMS320x280xx Control Law Accelerator C/C++ Codegen Unix v18.1.3.LTS *
    ;* Date/Time created: Wed Aug  8 07:56:36 2018                 *
    ;***************************************************************
    	.compiler_opts --abi=coffabi --cla_support=cla2 --diag_wrap=off --float_support=fpu32 --hll_source=on --mem_model:code=flat --mem_model:data=large --object_format=coff --silicon_version=28 --symdebug:none --tmu_support=tmu0
    
    ;...
    
    ;***************************************************************
    ;* FNAME: _inverter_clainit             FR SIZE:   0           *
    ;*                                                             *
    ;* FUNCTION ENVIRONMENT                                        *
    ;*                                                             *
    ;* FUNCTION PROPERTIES                                         *
    ;*                            0 Auto,  0 SOE     *
    ;***************************************************************
    
    _inverter_clainit:
            MMOVIZ    MR0,#0                ; [CPU_FPU] |21| 
            MMOVXI    MR0,#256              ; [CPU_FPU] |21| 
            MMOV16    @_EPwm1Regs+64,MR0    ; [CPU_FPU] |21| 
            MNOP      ; [CPU_FPU] 
            MNOP      ; [CPU_FPU] 
            MSTOP     ; [CPU_FPU] 
            ; ireturn occurs ; [] 
    ;**************************************************************
    ;* UNDEFINED EXTERNAL REFERENCES                              *
    ;**************************************************************
    	.global	_EPwm1Regs

  • Thank you the additional detail.  I am able to produce a similar result.  I filed CODEGEN-5171 in the SDOWP system to have this addressed.  You are welcome to follow it with the SDOWP link below in my signature.  CODEGEN-5171 does not report a bug against the compiler, but requests a performance enhancement.  The generated code is not wrong, but can be improved.

    Thanks and regards,

    -George