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Webench Power Designer - Ceramic Capacitor DC Bias

Ryuji
Guru 20090 points
Other Parts Discussed in Thread: LM43601

Hello,

Does the webench power desinger consider DC bias characteristics of ceramic capasitor on the simulation ?

I think that if the device datasheet discribes the capacitance with voltage rating(for example LM43601) , the webench consider voltage rating.
However, there is no discription about voltage rating of the capacitance, the webench does not consider DC bias of the chapaciter.

Best Regards,
Ryuji Asaka 

  • 0
    Guru 20090 points
    Hello Webench Design Centor team,

    I'm looking forward to your reply.

    Best Regards,
    Ryuji Asaka
  • 0 in reply to Ryuji
    TI__Expert 3085 points

    Asaka-San,

    Capacitance of the ceramic capacitors decreases with increasing DC bias.  WEBENCH takes this derating into account when it uses the capacitance of the ceramic capacitors in the internal calculations.

    Let me know if this answers your question. 

  • 0 in reply to Surinder Singh
    Guru 20090 points
    Hello Singh san,

    Thank you for the reply.

    Could you please let me know the internal calculations for correctting the capacitance of the ceramic capacitors?

    I think thaa the DC bias characteristics is different between ceramic capacitors.
    I don't think that the Webench include each ceramic capacitors DC bias characteristics.

    Best Reards,
    Ryuji Asaka
  • 0 in reply to Ryuji
    TI__Mastermind 27440 points

    Asaka-san,

    WEBENCH uses a generic derating curve (attached image) for output ceramic caps. The x-axis is the ratio of applied voltage to the output ceramic cap to the votlage rating of the cap and y-axis is the ratio of the actual cap value to the standard or ideal value. As you can see, the minimum value of Capacitance retained is around 60%.

    Regards,

    Amod

  • 0 in reply to Amod Vaze
    Guru 20090 points
    Hello Amod san,

    Thank you for the reply.
    Is this derating curves using for "output" caps only?
    In the case of other capacitor (for example, input, bias input, boot strap, or etc.) , what happens?

    Best Regards,
    Ryuji Asaka
  • 0 in reply to Ryuji
    TI__Mastermind 27440 points
    Asaka-san,

    At this point, we do the derating only for the output caps. The other cap values are retained to the standard values.

    Regards,
    Amod