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DLPC350: I2C Read sequence example

Part Number: DLPC350

Hi,

I am having trouble interpreting exactly what is meant in Section 1.1.2 I2C Read Transaction Sequence of the DLPC350 datasheet.

Step 1, 2, 3 are pretty clear.

For step 4, A Start + address is sent again.

How should this part of step 5 be done? "If bit zero is not set, the read transaction repeats until bit zero is set"
if bit zero is not set, should the master send a STOP command, and then repeat from step 4 (send the start + address, and read one byte again)

So should the sequence be:
START + ADDRESS + WRITE
SUB ADDRESS
STOP

START + ADDRESS + READ
<read one byte>   for example, the byte is 0x00
STOP

START + ADDRESS + READ
<read one byte>   for example, the byte is 0x01
<read rest of bytes>
STOP

?

Perhaps you can provide a detailed I2C trace exemplifying the transactions?

Many thanks.

Oliver Tedder.

  • To add to this:
    I have been previously doing this sequence, say if i wanted to read 3 data bytes from register 0x6A (Trigger Out1 Control), with the dlpc350 at i2c address 0x1A.

    START  + 0x1A + WRITE
    0x6A
    STOP

    dataread:
    START + 0x1A + READ
    <read 4 bytes> 
    STOP

    If status byte (byte[0]) is 0x0, repeat the section "dataread" above until either the status byte is 0x1, or 0x3.
    Use  bytes 1,2 and 3 as required.

    To put it in the language of 1.1.2.1 Example Read Transaction Sequence, an example of the sequence i am doing is:

    S 34 6A P

    S 35 00 xx xx xx P    - status byte is 00, but i still have read 3 additional bytes which i discard.  I wait 5ms and try again...
    S 35 00 xx xx xx P    - status byte is still 00, so i try again...
    S 35 01 xx xx xx P    - status byte is now 01 so i take the bytes xx xx xx and use them to determine the status of the trigger out 1 control

    This process has been working but I believe, from reading the datasheet, my procedure is not correct because i read 4 bytes each time i receive a "not read" status byte, rather than just 1.  
    Is my process correct?  If not, how should the correct process look?

    Please see the attached PDF which shows a details trace of the I2C lines during the above transaction.

    HW-526.pdf
    As i mentioned, it would be very helpful to have a default I2C trace of how the above transaction should go (reading register 0x6A) including some instances of reading "not ready yet" status bytes (0x0).

    Many thanks,

  • Oliver.

    the process for reading from a register is as follows 

    1)start condition

    2) master addresses DLPC350 with 7 bit device address + R/W bit set to 0 (write)

    3) wait for acknowledge from DLPC350

    4)master transmits 8 bit address of register it wishes to start reading from

    5) wait for acknowledge from DLPC350

    6) master repeats a start condition (or a back to back stop-start should work as well(?))

    7) master again sends the 7 bit device address with R/W bit set to 1 (read)

    8)wait for acknowledge from DLPC350

    9)DLPC350 then immediately transmits the 8 bits from the register and then releases the data line. it is the job of the master to pull SDA low indicating the byte was recieved and it is ready for another. if the master doesnt pull SDA low the DLPC350 will stop transmitting bytes. 

    10) master can continue in this way until all reagisters after the first are read, or the master can stop communication with a NACK and a stop condition.

    Hope this helps,

    Also this document can help understand the I2C read/write procedure www.ti.com/.../slva704.pdf

    Best regards,

    Arthur Brown