Other Parts Discussed in Thread: TIDA-00570, DLPC410
Designing with the DLPC910.
looking at the datasheet (DLPS064D – SEPTEMBER 2015 – REVISED SEPTEMBER 2020". for PWR_FLOAT pin, it is stated that " Park DMD mirrors."...and nothing more.
looking into document (TIDA-00570 High Speed DLP Sub-system DLPC910 Main Board) - DLPC910 Sample Design schematics, this pin is connected through a NAND gate.
My question is, Is it needed in the DLPC910 to use the NAND gate? this demand appears on the DLPC410 datasheet which we use also (and there exist a difference from datasheet which states NOR and EVM which utilizes NAND).
Appreciate your help