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DLP9000X: DLP9000X EVB

Moshe Levy
Prodigy 230 points
Part Number: DLP9000X

Hello,

I am designing a circuit to work with the DLP9000X. I am basing my schematics on TI EVB schematics (attached).
on those schematics, there are circuits to for the power down procedure of the DLP9000X. 

My questions are:

1. I am trying to understand each discrete circuit of the VOFFSET, VRESET, VBIAS power down on page 4(I circled them).

    1.1 VOFFSET.
          1.1.1 on normal mode the EN_OFFSET is '1' and thus Q3=ON which results in Q2=OFF and Q1 also OFF => VOFFSET working regular
          1.1.2 on power down...EN_OFFSET is '0' and thus Q3=OFF which results in Q2=ON and thus Q1=ON => VOFFSET tied to 3.3V by D1 Zener diode? until powered down?
     1.2 VRESET
          1.2.1 on normal mode the EN_OFFSET is '1' and VRESET is powered (-10V per schematics) .....Q4 is OFF?! and also Q5, Q6 ....i.e: normal operation.
          1.1.2 on power down...EN_OFFSET is '0' and thus Q4=ON (? not sure i understand why) which results results in Q6=ON and thus Q5=ON => VRESET tied to GND?
   1.3 VBIAS.
          1.1.1 on normal mode the EN_OFFSET is '1' and thus Q9=ON which results in Q8=OFF and thus Q7 also OFF => VBIAS working regular
          1.1.2 on power down...EN_OFFSET is '0' and thus Q9=OFF which results in Q8=ON and thus Q7=ON => VBIAS tied to GND?

2. based on the above. May i know why I need such transistors? 2N2222 exists only in T.H form. trying to select other SMT I find that the Collector- Base Voltage VCBO of 60 V and Emitter- Base Voltage VEBO of 6V
    determine that T.H package... why those figures were chosen. the reason i ask is that each of those transistors costs around $5...so the whole solution for power down estimates to around $20-$30 per board.... doesn't sound reasonable....


  • 0
    TI__Intellectual 2580 points

    Moshe,

    The circuit you are referring to help ensure the proper power-down of the DMD voltages.  Voffset, Vreset, and Vbias ("Vorb") need to power down before Vcc.  The power-down sequence is quite important.

    Regarding this question/comment:
    > 1.1.2 on power down...EN_OFFSET is '0' and thus Q3=OFF which results in Q2=ON and thus Q1=ON => VOFFSET tied to 3.3V by D1 Zener diode? until powered down?

    DMD_VCC is while Vorb are OFF.  Voffset is connected directly to DMD_VCC through D2 and L5; the D1 Zener diode keeps DMD_VCC from being shorted to ground while Vorb are powered off.

    The transistors needed for this are all available in SOT-23 type surface mount packages for less than $0.25 a piece.  If you refer to the some of the newer reference designs, you will find similar or less complex power-down circuits with more specific part numbers.  This design uses MMBT2222A, which is readily available: TIDA-00570 Schematic.   

    If you want to look a more modern, you can refer to DLP471TEEVM and DLP650TEEVM Board Design Files , which uses a very similar DMD power supply design but has a simplified power-down circuit with only 5 transistors instead of 8.

    In whatever implementation you chose, you should check to make sure the power sequencing of the DMD meets the datasheet requirements on your hardware.

    Regarsd,

    Gary

  • +1 in reply to Gary S
    Prodigy 230 points

    Thank Gary