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Original question:

DLPLCRC410EVM: DLP7000

DLPLCRC410EVM: Programmatically generate binary patterns in APPSFPGA

Andres Aguirre
Prodigy 10 points
Part Number: DLPLCRC410EVM
Other Parts Discussed in Thread: DLPLCR70EVM,

Hello, I have a DLPLCRC410EVM paired with a DLPLCR70EVM

I have used DLP Discovery 4100 Explorer GUI successfully and everything works fine with the test patterns that come out of the box.

However, our application has to go above tens of Khz for custom binary patterns. These binary patterns are simple and usually consist of scanning columns or rows of pixels, but we would like to achieve the maximum frame rate possible with this hardware.

I have checked the external memory options with Vialux, but unfortunately we have a limited time frame and budget.

Our second option, as per suggestions in this forum, is to generate the patterns programmatically in the APPSFPGA. Can we do this by connecting DLPLCRC410EVM directly to the USB port? Or is there any additional required Hardware to generate this patterns programmatically?

Thanks for your help

  • 0
    TI__Mastermind 43125 points

    Andres,

    You will need a Xilinx Platform cable (JTAG) and IDE (Integrated Development Environment) to write your own VHDL code to put into the FPGA or store it into the PROM.  You can alternatively use a Verilog environment that can be used to load code into the Virtex 5 LX30 on board.  This cannot be done over the USB port.

    You will need to develop code that will generate row data according to the pattern you want and load it.  The FPGA source can be used to see how loading is done.

    Fizix