Other Parts Discussed in Thread: DLPDLCR4710EVM-G2
In the DLPDLCR4710EVM-G2 Gerer TIDCCK2,I can not find stackup for the layout.
Can TI provide stackup information with distance between layers.
Thanks.
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In the DLPDLCR4710EVM-G2 Gerer TIDCCK2,I can not find stackup for the layout.
Can TI provide stackup information with distance between layers.
Thanks.
Hello User,
Welcome to the E2E forum and thank you for your interest in DLP technology!
Thank you for bringing this to our attention. Please allow us to investigate this and someone from our team will soon reach out to you.
Appreciate your patience
Regards,
Akhil
Hello User,
The stack-up varies based on fab house. You need to discuss with your fab house for the final stack up based on their capabilities.
The fab drawing include the resistance requirement for each layer.
I have attached the stack up used for this reference design.
regards,
Vivek