Other Parts Discussed in Thread: DLPLCRC910EVM
Tool/software:
Hello TI expert:
we have a question when we verify the spi flash solution in dlpc910 design.
The test board with dlpc910 is good board, it can work well.
we jump wire on the GOOD dlpc910 test board.
the step as follow:
1,verify the environment, its work well.
2,burn the bin file(DLPR910A.bin) to the SPI flash (IS25LP128F-JBLE)
3,remove R46, and pull up from DDC_M0 to VCC3V3 with 4.7kohm resistor
4, remove R38, and jump wire from DLPC_DIN to the pin2 of the SPI flash
5,jump wire from AA10 to pin1 of SPI flash, remove R12
6, jump wire from DLPC_CCLK to pin6 of the SPI flash. note:DLPC_CCLK still connected to DLPR910AYVA
7,jump wire AA9 to pin5 of the SPI flash. note:DLPC_CCLK still connected to FPGA as reverved(FPGA Pulldown default).
8, pull up pin1,pin3,pin7 of the SPI flash with each 4.7kohm resistor.
9, CONNECT 3.3V and GND to the SPI flash
10,power on,it can't work well.
11 mesure the waveform of the SPI signal, it seems ok.
the different between EVM and our test board
1, DLPC_DONE,DLPC_INITB,DLPC_CCLK didn't disconnected to DLPR910AYVA
2. AA9 still connect to FPGA as reverved.
question:
1,DLPC_DONE,DLPC_INITB,DLPC_CCLK must be disconnected to DLPR910AYVA?
2, AA9 must be disconnected to FPGA?
3,can you provide some advise?
SPI CLK
MISO
MOSI
CS