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DLPC2607: Design Doubts in DLPC2607 EVM

Poovarasan Selvakumar
Prodigy 50 points
Part Number: DLPC2607
Other Parts Discussed in Thread: DLPM2000EVM, DLPDLCR2000EVM, DLPA1000, DLPA100,

Tool/software:

Hi Team,

We are currently using the DLPM2000EVM and DLPDLCR2000EVM modules in our new project. While reviewing the schematics of the DLPDLCR2000EVM, I encountered a few design questions that I’d like to clarify. I’ve outlined these questions below:

Question 1:



Could you explain the purpose of the 30kΩ resistor connected to the thermistor? Specifically, is there a calculation or rationale behind this choice? If possible, could you share any details or references for our understanding?


Question 2:

Could you please clarify why the DMD_PWR_EN pin is left unconnected? According to the datasheet, it is recommended to connect it to the DLPA1000. Could you provide further explanation on this?



Question 3:

Could you please clarify why the CMP_PWM requires the circuit with the multistage RC filter? What is the reasoning behind using these filters? If possible, could you share any relevant calculations for reference?



Question 4:
Should DDR termination be applied at the source, destination, or in the middle of the trace? Which location is most effective, and why?



Question 5:
I’m very much interested in knowing the calculations for inductors L3 and L4 of DLPA100, how these values are chosen, please describe.

Question 6:

Why is a 50Ω impedance ferrite bead required in the VDD_PLL domain? Also, the capacitor values used in the design differ from the recommendations in the datasheet. Could you provide any specific reasoning or calculations behind this choice?


Please let me know if you have any questions.

  • 0
    TI__Expert 8740 points

    Hello User,

    Welcome back to the E2E forums and we hope to assist you with your questions.

    Please see the following responses.

    1.)

    The 30K resistor is used so that there is a voltage divider for the CMP_PWM signal and so that there is a variance on that signal into the DLPA1000. If there was no 30K resistor there, the value would always be the nominal voltage of CMP_PWM and would not vary.

    2.)

    DMD_PWR_EN is not used with the DLPA1000.

    3.)

    The multiplestage filter may have been adapted from a previous design and is not necessary. A single stage RC filter is fine.

    4.)

    Please see the following from the DLPC2607 datasheet.

    5.)

    Please see the following from the DLPA1000 datasheet. For L4, the DMD regulator specifications from the electrical specifications have L = 10 uH. 

    You can see the block diagram with inductors in section 7.2. Please note there is a typo the inductors should say uH instead of uF.

    6.)

    Please see the following from the DLPC2607 datasheet. The schematic may have had a typo for the 10 uF capacitor it should have been 10nF or 0.01uF as indicated in the datasheet. Please follow the capacitor recommendations in the datasheet.

    Regards,

    Alex Chan

  • 0 in reply to Alexander Chan
    Prodigy 50 points

    Hi Alex,

    Thank you for you're reply.
    Please find my comments below,

    1. Understood 30K used for making a divider network but 30K resister selected? Can we use other values like 10K / 20K/50K etc?. Any significance is to select 30K resister? What is the value for Vref?
    2. Why DMD_PWR_EN is not used with the DLPA1000? Any technical reason is there?
    3. Why 1K and 0.1UF is used in RC network? Could you please share the design calculations for this?
    4. Usually termination either at Source or destination side based on signals. But TI recommended to use this in middle between Source & Destination for DDR. Why?
    5. Will check on this.
    6. Understood that there is a typo for Capacitor in PLL filter network. Why is a 50Ω impedance ferrite bead required in the VDD_PLL domain? How the ferrite bead value arrived as 50Ω ? Could you share the PLL filter calculation ?

    Regards,
    Poovarasan S

  • 0 in reply to Poovarasan Selvakumar
    TI__Expert 5790 points

    Hello User,

    Please allow the team time to look into your questions.

    Best,

    John

  • 0 in reply to John McKnight
    Prodigy 50 points

    Hi John,

    Do you have any update on my request?

    Regards,
    Poovarasan S

  • 0 in reply to Poovarasan Selvakumar
    TI__Expert 8740 points

    Hello User,

    Please see the following responses to your questions. 

    1.)

    The resistor values can be whatever you want as long as the voltage read in by SENS2 for the DLPA1000 is within range. From the DLPA1000 datasheet, the input voltage range for SENS2 is -0.3V to 3.6V. Vs in the below equation would be equivalent to CMP_PWR which you can find the voltage information in the DLPC2607 datasheet. 

    2.)

    The DLPC2607 communitcates to the DLPA1000 through SPI for necessary information and thus the PWR_EN signal is not used. 

    3.)

    These values are what is in the DLPA1000 typical application. If you have further questions please contact the power management forums as they will have further details on DLPA1000 design decisions. 

    4.)

    Termination in the middle may be for better signal integrity for reads and writes when the termination resistor is placed in the middle.

    6.)

    A ferrite bead can help with noise issues with the PLL such as switching noise. The higher impedance of 50 ohms or greater is to help prevent noise harmonics caused by the PLL from spreading to the rest of the PCB board.

    Regards,

    Alex Chan