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DLPC3479: DLPC3479 Auto auto initializaiton and I2C failure , external pattern mode Beam Firmware ,Host IRQ High

LP Kim
Intellectual 480 points
Part Number: DLPC3479
Other Parts Discussed in Thread: DLPA3005,

Tool/software:

Dear TI Members

I solved related to  "auto initializaiton and I2C failure" after changing the default LED Current. 

 [sloved issue]

To use an external pattern mode, Beam FW was created in the same way as when using DLPC3010. 
The firmware I created seems to have been created properly such attached 
In DLPC4710 EVM, both Master IRQ and Slave IRQ drop to Low using external pattern mode Version-3 . However, in our hardware, Slave IRQ is always high. 

 Does the Slave DLPC3479 check a specific Pin or receive a signal from the Master DLPC3479 during auto initialization using  External pattern Mode firmware? 

Please give me some advice.

Version-A) FWSel_DLPC3479_DLPA3005_pm1_i2c0x36_v8p4p0 ( From TI FW SELECTOR)

Version-B) 250121_RED5A_GRE5A_BLUE5A

               -. Only changed LED Current from 10A to 5A using Version-A

Version-C) 250121_10HZ_3Pattern_Pre1980_Exp29000_Post1450_RGB5A 

               -. Only changed LED Current and external Pattern parameter using Version –A

               -. (DLPC3010) Used the normally to our hardware after making the external Patter FW using the same method.



 250123_TI.pdf250123_BEAM FW.zip
  • +1
    TI__Genius 9985 points

    Hey LP,

    Since your software requires Pin Mapping Option 1, I've opted to recreate this with the Pin Mapping Option 2. There should be no difference in the software at all excluding this.

    B runs as expected

    C also runs as expected

    During the initialization the display size (12h), input image size (2Eh) and Video Source Format (07h - always 0x43 for RGB888) are also defined. I would recommend you utilize these commands.

    Display size is 1920x1080 (80 08 38 04)

    Input Image size is 1920x1080 (80 08 38 04)

    Also, are you seeing a full-image or a half-image?

    Best,

    Aaron

  • +1 in reply to Aaron Black
    Intellectual 480 points

    Dear Aaron Black

    C also runs as expected

    During the initialization the display size (12h), input image size (2Eh) and Video Source Format (07h - always 0x43 for RGB888) are also defined. I would recommend you utilize these commands.

    Display size is 1920x1080 (80 08 38 04)

    Input Image size is 1920x1080 (80 08 38 04)

    [250124-Q1] 

    In Version-C, on our board, the Master Host IRQ is set to Low, and the Slave Host IRQ is set to High.
    A) When you mentioned "During the initialization," are you referring to the process where, after the Master DLPC and Slave DLPC complete auto initialization, the Display Size and Input Image Size are configured using I2C?
    Isn't the Display Size already included in the default TI firmware?


    [250124-Q2]

    Does the Slave DLPC3479 check a specific Pin or receive a signal from the Master DLPC3479 during auto initialization using  External pattern Mode firmware? 

    TI EVM is OK. Out Hardware :  DLPC is HOST_IRQ=Low , but Slave IRQ=High, 
    Do you think that the schematic is error? 

    Thanks
  • +1 in reply to LP Kim
    TI__Genius 9985 points

    Hello LP,

    I think my question wasn't answered - do you see a half-image, full-image or no image at all? I'm wondering if the rest of the power state continued for the rest of the whole system.

    Yes, "During the initialization" is in reference to the auto initialization configuration.

    Since the only difference is the hardware, I'm thinking the schematic is most likely in error, I also can't recreate your issue because the EVM works as you've stated.

    For you question:

    LP Kim said:
    Does the Slave DLPC3479 check a specific Pin or receive a signal from the Master DLPC3479 during auto initialization using External pattern Mode firmware?

    Yes, the primary and the secondary need to be connected through GPIO6 (secondary) and GPIO5 (primary) but if it is working for Version-B, you should have the hardware already properly connected.

    Does an LED come on or RESETZ go high? EVM shows momentary high through D56.

    Best,

    Aaron

  • 0 in reply to Aaron Black
    Intellectual 480 points

    Dear AaRON Black

    [250126-Q1] Test Condition : Version-C (=External Beam FW) and Out HW 

    It appears that only half is being projected. The Slave IRQ is in a High state.

    RESETZ go high. I haven't found anything unusual with the other power supplies either.

    [250126-Q2] As per your request, I have already shared the schematic.

    Please review the circuit for any peculiarities. I couldn’t find any significant issues.

    The schematic does not include RB101, but it is currently mounted.

    [250126-Q3 :Important, Not mentioned the specificaiton] 

    Q3-A ) In the attached Test Case-C1,

        it seems that both the Master DLPC and Slave DLPC must successfully complete "Auto initialization" for the I2C to function properly.   

        It seems that when the Host (or FPGA) performs Read/Write operations on the register for specific functions or information, communication with the HOSToccurs only when both the Master DLPC and Slave DLPC are functioning correctly.

        Is this correct?

    [Operatiing Scenario] 

    When downloading the External Pattern Firmware to our board, the Slave DLPC undergoes Auto Initialization for an unknown reason.

    We are continuing to investigate the cause.

    We are currently verifying by modifying the operation scenario as follows:

    1. Download Version-B to both Master and Slave DLPC.
    2. Change the Test Pattern Generator mode to External Pattern streaming mode using resiter read/write between FPGA and Main DPLC I2C
      • After writing the register, we readed that it is set to External Pattern Streaming Mode.

    [Q3-B] 

    If the register read result confirms that the system is in External Pattern Streaming Mode,

    can it be understood that the Slave DLPC is also correctly set to External Pattern Streaming Mode?

    Is it possible that the register could be read in External Pattern Streaming mode even if the Main DLPC is in External Pattern Streaming mode and the Slave is not in External Pattern mode? We cannot access the Slave DLPC registers.

    We cannot access the Slave DLPC registers.

    Question-Read Slave DLPC Register access

    Thanks 

    Best Regards 

    250126_TI_QA.pdf

  • 0 in reply to LP Kim
    TI__Genius 9985 points

    Hello LP,

    The half-image issue was a known issue with the last version of the software but was thought to be fixed in the latest 8.4.0 version of software.

    I'm thinking the GUI tool may be colliding with the already established auto initialization file. Could you specify how you went from version A to version B or C?

    The D4h command cannot be sent to the secondary controller because this command is only for the primary controller. I'm checking with my team to see if there are any passthrough commands that do enable the reading back of the secondary controller.

    Could you expand on why there is a 'DLPC3010' written in this table?

    I'm sorry I have not resolved this quicker for you!

    Best,

    Aaron

  • 0 in reply to Aaron Black
    Intellectual 480 points

    Dear Aaron Black 

    Thank you for your reply. 

    The half-image issue was a known issue 

    [250128-Q1] I tested Version -C and will check the image Size using version-B. 

    Was the known issue that the Slave Master IRQR was in a Low state?

    [250128-Q2]

    [250126-Q2] : Could you review it to see if there are any notable issues related to the shcematics?

     Q3-A ) of 250126 : Do you review thme? 

    It seems that when the Host (or FPGA) performs Read/Write operations on the register for specific functions or information, communication with the HOSToccurs only when both the Master DLPC and Slave DLPC are functioning correctly. Is that correct? 

    1. Change the Test Pattern Generator mode to External Pattern streaming mode using resiter read/write between FPGA and Main DPLC I2C
      • After writing the register, it readed/changed  that it is set to from test pattern mode to External Pattern Streaming Mode.

    Can it be understood that the Slave DLPC is also correctly set to External Pattern Streaming Mode?

    Is it possible that the register could be read in External Pattern Streaming mode even if the Main DLPC is in External Pattern Streaming mode and the Slave is not in External Pattern mode.

    Could you specify how you went from version A to version B or C?

    Could you expand on why there is a 'DLPC3010' written in this table?

    [250128-Q3] 

    I will share documents or vidoe file how to make beam F/W. 

    "The current external pattern mode Beam FW was created using the same method as when we used the DLPC3010 in the past.

    Therefore, we mentioned that (DLPC3010) was normally used with our hardware after creating the external pattern FW using the same method.

    Thanks 

    Best Regards

  • 0 in reply to LP Kim
    TI__Genius 9985 points

    Hey LP,

    The half-image had to do with a change between LC mode to display mode and the controllers would fall out of sync and flicker as they were out of sync. I had heard about the issue but didn't know the result of the failure.

    This issue is more so about the initialization of the controller and not a transition issue. I'm suspect of how the FW is being built as I'm thinking this may be playing with our definitions and the change to External Pattern mode may be an issue.

    I'm leaning much more to a software solution but I need to understand how you are building the version B and C firmware's. I'll send additional things through direct message as well - look for that.

    Best,

    Aaron

  • 0 in reply to Aaron Black
    Intellectual 480 points

    Dear Aaron Black 
    The issue has been resolved on the hardware we developed.

    Thanks 

    Best Regards