Hi everyone,
While checking the configuration of 3D video input to the DDP4422, we ran into some timing problems, trying now to find some possible solutions here..
The DDP4422 DLP controller allows video input up to 60bit to achieve the required high datarates. This parallel video input is fed from the 30bit output of two Thine THC63LVD1024 LVDS receivers operating in dual to single mode and thus converting 4 channels (at 5 lanes) of LVDS video. Although they in turn receive input from the same source, we expect different propagation delays at their output stages. As the setup margins of the DDP4422 are very close, it will be necessary to either de-skew or synchronize both 30bit channels.
Any ideas to solve this would be very appreciated!
Best regards,
Kurt