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DLPC910: Information on how to control the video input Row and Block signals

Part Number: DLPC910
Other Parts Discussed in Thread: DLPC900, DLP9000X

Hello All,

Please help with following questions regarding the DLPC910 if you can.

1) DLPC900 older version would allow to just input parallel video and drive the DLP6500 on the other side without the need for additional signals.

    DLPC910 instead has changed the inputs from parallel to LVDS and there are additional row and block signals that need to be controlled. 

   My question would be: is there a way to just sen LVDS input with configuration settings loaded from ROM and drive the DMD without additional control.

   If we have to have the additional control with Row and Block signals, does TI provide application code or FPGA core for achieving the goal?

2) There are reference designs with DLPC900 which is going obsolete and we cannot use them but there are no reference designs for DLPC910 with DLP6500

   to see how this more complex controller is designed. Is there a reference design elsewhere we can have a look at?

Please let me know even if I am misstating something.

Thank You