DLPDLCR4710EVM-G2: schematic and PCB layout file of dmd board of DLPDLCR4710EVM-G2

Hi Philippe,

I want DMD flex PCB files. I was downloaded all files in TIDA-01226

But I can not find any thing about DMD flex PCB files!!!

Best regards

Jack,

Like the optical engine, the flex cable is designed and provided by YOI. Since it is their proprietary design, they own it.

Are you looking for specific information about the flex? I may be able to assist you further in that regard.

- Philippe

Hi Philippe,

Can you send for me a typical circuit schematic for flex board. We have schematic of controller board from input to connector of flex board. what is the final section of schematic? I want exactly to the dlp chip pins!

Best Regards

Jack,

There is some discussion on this topic here: https://e2e.ti.com/support/dlp/f/94/t/794316

I do not believe we have any "example designs" available on TI.com. Let me confirm and notify you ASAP.

- Philippe

Hi Philippe,

I,m waiting for you pls send for me an example design.

I see there is two spi flash(for slave and master) in the flex dmd board. We have two spi flash(for slave and master) in controller board so why there are two spi flash on dmd flex board?

Two spi flash for master (or slave) there are in same spi bus but 0 ohm resistor of cs (chip select) of spi flash for dmd flex board was not mountage.  spi flesh on dmd flex board is not usable and we can demountage those spi flash from dmd flex board?

Jack,

We are looking into your queries and will get back to you very soon.

Regards,

Mayank

Hi Vivek,

Pls send to me a design file for dlp4710.

In other word how I can continue signals from fpc connector of controller board to dlp4710 chip pins.

Best Regards

Hi Jack Man,

Sure. We are looking at the same.

Regards,

Sanjeev

Hi Vivek,

Thanks for your attention

I will check these files.

Best regards

Hi Vivek,

I am working with Altium and I have some problem to import your file so I am working on it.

For use DLP4710, we must use S312 interposer (Neoconix Part Number=BDX0100CMMHFAU00)? or there is another solution?

There is a "IT6801FN" HDMI chip in controller board but there is not datasheet file in the web!!

can you send datasheet of this chip for me? and there in not "IT6801FN" in any distributor site so can you tell me an alternative part?

operational temperature for DLP4710 is -20 to +90 degree but operational temperature for DLPA3005DPFD is 0 to +70 degree. When we use these two chips together, the final operating temperature is 0 to 70 degrees so can you tell me an alternative part for DLPA3005DPFD?

Best Regards

Hi Jack man,

We are looking into your query. We will respond soon.

Regards,

Sanjeev

Hi Vivek,

Can I use "TPS99000-Q1" with dlp4710?

For the dlp4710, the standard chip is dlpa3005, but what changes do I need if I want to use "TPS99000-Q1"? Is this possible at all?

For "IT6801FN" I emailed ite, but apparently they only give information to the companies, so please give me the datasheet of this piece.

Best Regards

Hi,

in the schematic file of dlp4710 (tidrnb9.pdf) we see a connection table in page 7 (why dlpa3439 instead of dlpc3439 ???)

but in dlpc3439 datasheet in page 39 we see another connection table

why these two above table are not equal?

for example for "Input DATA_p_0" :

in "tidrnb9.pdf" => Master=HS_WDATA_E_P   Slave=HS_WDATA_D_P

in "dlpc3439.pdf" => Master=HS_WDATA_D_P   Slave=HS_WDATA_E_P

which one of them are true?

What is the "swap control"?

Best Regards

Jack,

The table cell reading "DLPA3439" is an error. It should instead read "DLPC3439".

The swap control refers to the pin mapping order (which is software configurable between two different potential settings) from the controller to the DMD. I recommend referring to the DMD pin mapping swap control table in the DLPC3439 datasheet, as it is less confusing in this case. They are both technically correct though.

Regards,

Philippe Dollo

Hi Phillippe,

Pls more explain for me.

I did not find any software control for pin mapping order in any pdf files about dlpc3439! Only a pin for master and slave selection.

And in page 39 of dlpc3439 datasheet in 8.3.10 dmd(sub-lvds) interface I see a table that is not same as the table in "tidrnb9.pdf" page 7?

Master and slave configuration is vice versa in two table!!!

And I can not find "swap control" in any pdf files about dlpc3439! 

Best Regards

Jack,

Our team is looking into your queries and will get back to you soon. 

Your patience is appreciated.

Regards,

Mayank

Hi Mayank,

What's up?

I'm waiting for you

Best Regards

Hi Philippe,

Thanks for your answer.

But that was not the answer to all my questions! I was asked:

"And in page 39 of dlpc3439 datasheet in 8.3.10 dmd(sub-lvds) interface I see a table that is not same as the table in "tidrnb9.pdf" page 7?

Master and slave configuration is vice versa in two table!!!"

I know this chip has two pin mapping option but I see two tables in the schematic files and datasheet of this chip that are opposite to each other !!! why?

I was check the board of eval module and datasheet seems to be wrong!

in page 7 of schematic, I see:

in page 39 of datasheet, I see:

for example for "Input DATA_p_0" :

in "tidrnb9.pdf" => Master=HS_WDATA_E_P   Slave=HS_WDATA_D_P

in "dlpc3439.pdf" => Master=HS_WDATA_D_P   Slave=HS_WDATA_E_P

Best Regards

Hi Jack,

Thank you for bringing this to our attention. We will look into this and get back to you shortly.

Regards,

Austin