Other Parts Discussed in Thread: DLPR910, , DLPC900, DLPC410
The connection between DLPC910 and DLPR910 is referred to TI DLPR910 datasheet. Now, the ECP2_FINISHED signal cann't go high , which means the program cann't be loaded.
The difference with datasheet is that the DLPC910's 50MHz clock is not driven by crystal. The FPGA supplys the 50MHz clock. Therefor, when the DLPC910 load the program, the 50MHz clock is not ready.
Does this difference matters?
And how to deal with the ECP2_FINISHED signal cann't go high ?