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DLPA2005: when PROJ_ON is pulled low, 1V8 on LS_OUT falls to just 0.946V

Part Number: DLPA2005
Other Parts Discussed in Thread: DLPC3478


today I came across strange issue. DLPA2005 is used as a PMIC for DLPC3478. When PROJ_ON is pulled low, the 1V8_DLPC on LS_OUT falls just to 0V95 while I would expect 0V as the other voltage for DLPC (1.1V). When pull-down is applied (e.g 4k7), the voltage decreases and jumps back when pull-down is removed.

The DLPC is being supplied just by 1V1 and 1V8_DLPC from DLPA. However, there is a couple of 1V8 signals that goes from MCU to DLPC (GPIO, parallel stream interface) that comes from different 1V8 supply. Really cant find any external pull-up that would back feed this 1V8 to 1V8_DLPC, is possible that this happens through the internal chip structure? Does this affect chip lifetime/reliability/functinality somehow? 

Many thanks


  • Hi Petr,

    Welcome to TI E2E Forums!

    Kindly provide us some time to look at this and get back. Thanks for your patience!

  • Hi Hirak,

    I deeply investigated the issue and found the possible root cause. The issue was caused by PCLK being supplied when PROJ_ON was pulled low.

    I made a couple of HW tests:

    1) Test 1: PROJ_ON low ->1V8_DLP = 0.946V

    2) Test 2: PROJ_ON low -> 1V8_DLP = 0.946V -> PCLK grounded for a short time by wire -> 1V8_DLP falls to 0V

    Fix was implemented (disabling PCLK) and it now behaves OK. I can't say what is actually happening inside of the chip, but seems like that running PCLK prevents it to go to proper shutdown and something happens on the internal structure (this I will leave upon your investigation). 



  • Hi Michal,

    Thank you for your detailed analysis and input. We will note make of the same. If i have any more information to share with you we will get back to you. Thank you again for the analysis.