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DLPC6401 not booting

Jim Teunis
Intellectual 280 points
Part Number: DLPC6401

Hello all,

I'm developing a custom PCB for the DLPC6401. I having trouble getting the device to boot. I have loaded firmware image onto the flash chip and then soldered the chip on the board. However, the POWER_ON_OFF pin is not being set high. I also don't get any output on the UART. When I do a I2C bus scan using a Bus Pirate, no results are found.

There is activity on the flash bus, however it doesn't seem like any data is being transferred. By "activity", this is what I mean:

  • On pm_addr_0 to pm_addr_7, I see a 2.10 MHz, 1.05 MHz, 528 kHz, 262 kHz, 33.9 kHz, 65.7 kHz, 32.8 kHz and 16.43 kHz square wave, respectively. Further address pins also show square waves of ever lower frequencies.
  • On flash_ce, I see a 2.10 MHz pulse train. On PM_OEZ as well.
  • However, all the data pins are continuously low.

The flash chip I'm using is the Cypress S29JL032J. This chip comes in various configurations of how the banks are distributed. The way I understand it, this does not impact the DLPC6401, however I'm new to flash chips so I am not sure. Currently, I am using the S29JL032J70TFI020 which has a 4/12/12/4 Mb layout. Does this matter? The manufacturer of my optical engine is not clear about this point.

Some more information:

  • All power supplies are within specification 50 ms before POSENSE is set high.
  • POSENSE and PWRGOOD are tied together.
  • The behavior is the same whether I connect the DMD or not.
  • I did not connect anything to UART_CTS and UART_CTS.
  • It does not matter if I pull I2C_ADDR_SEL high or low.
  • I received the flash image from my optical module manufacturer.
  • I flashed and verified the chip using a TL866II Plus flash programmer.

It seems to me that somehow I'm using the wrong flash chip, did not correctly flash the chip, or the image from the manufacturer is imcomplete. I would very much appreciate some pointers on how to proceed.

Many thanks,

Jim

  • 0
    TI__Mastermind 22840 points

    Hello Jim,

    Welcome to DLP forum and thank you for your interest in DLP technology.

    I will consult expert and get back to you by late next week. I understand that this a holiday week for us.

    regards,

    Vivek

  • 0 in reply to Vivek Thakur
    Intellectual 280 points

    Thank you Vivek, I have not received a response yet. Any input would be greatly appreciated.

  • 0 in reply to Jim Teunis
    TI__Genius 9971 points

    Jim,

    Our team is still looking into this issue. We will get back to you by mid of next week.

    Regards,

    Mayank

  • 0 in reply to Mayank Khandelwal
    TI__Mastermind 30875 points

    Jim,

    Mostly likely etiher the flash is not programmed correctly or there are board-level issues we need to figure out. Before you switch out to new flash part, have to tried the old flash part? I presume old flash part footprint matches the new one. 

    There are few other things you can look at after you ensure flash is good.

    Datasheet https://www.ti.com/lit/ds/symlink/dlpc6401.pdf 

    1. All power supplies are okay

    2. SYSTEM_CLOCK pins are okay and clock is fine.

    3. BOARD LEVEL TEST AND DEBUG signals in the datasheet connected properly

    4. Figure 2. Power Up sequence is matching 

    Regards,

    SAnjeev

  • 0 in reply to Sanjeev
    Intellectual 280 points

    Hi Sanjeev,

    Thanks for your reply.

    What do you mean with switching out the new flash part? There is no old or new, I have tried only one flash part. I flashed it, and then soldered it on the board.

    1. All power supplies are ok.

    2. System clock is running at 32 MHz as expected.

    3. I have carefully checked every pin connected with the reference design and the datasheet. I would be happy to share my schematics for review.

    4. In my design, PWRGOOD and POSENSE are connected together, there are asserted high about 50 ms after all power supplies are ok. Could this be an issue?

    Looking forward to your reply.

  • 0 in reply to Jim Teunis
    TI__Mastermind 30875 points

    Hi Jim,

    #4. As per datasheet Figure #2. it shows PWRGOOD follows POSENSE, if you have OE supplier reference HW you can look at it once.

    Also, there is this section on the state of the TSTPT pins 7.3.2.1 Calibration and Debug Support please make sure you follow the method.

    7.3.2 Program Memory Flash/SRAM Interface - controller attempts to load the bootloader code (first 128KB) on the flash connected on CS_1 line. 

    Ensure the valid image put on the flash, you can use the offline flash programer the just burn the first 128KB content from the OE supplied flash image when you have only 128KB content, you can contact OE supplier to show the BOOT HOLD pin which you need to GND, in this case, controller will be remain in bootprogram mode, after this you should be able to detect on the USB or communicate on the I2C bus, UART0 puts some messages. this will show controller is okay on the system.

    After this you can try programming full image file and then remove the BOOT HOLD pin.

    hope this helps

    Regards,

    Sanjeev

  • 0 in reply to Sanjeev
    Intellectual 280 points

    Hi Sanjeev,

    I'll take a look at the behavior of PWR and POSENSE on the OE reference design.

    Thanks for referring me to the TSTPT_[0-7] pins. In my design I have left them unconnected because the datasheet lists them as RESERVED and states they have internal pull-downs. Furthermore, it states that TI does not recommend to pullup TSTPT(7:1). An option for a pullup on TSTPT(0) is recommended but not stated as mandatory.

    I have already tried to tie the BOOT HOLD pin to ground, however I then had the full image stored on the flash chip. I will try it again with just the first 128 kB asap and let you know how it went.

    Thanks for your pointers so far, I will report back in a few days.

  • 0 in reply to Jim Teunis
    TI__Genius 9971 points

    Jim,

    Thanks for the confirmation. We will wait for your findings.

    Regards,

    Mayank