DLP9500: MODE_A(J1)/MODE_B(G1) pins

Uryyy

Part Number: DLP9500
Other Parts Discussed in Thread: DLPC410, DLPLCR95EVM

Hello TI Experts,

DLP9500 Datasheet describes MODE_A/MODE_B pins as " Data bandwidth mode select". I could not find the explanation in the datasheet. Please let me know the usage of MODE_A/MODE_B pins and the details.

Regards,

Uryyy

over 4 years ago

0 Gary S over 4 years ago

TI__Intellectual 2580 points

The MODE_A/B pins control how much of the LVDS bus will be used by the attached controller. The DLP9500 DMD is used with the DLPC410 controller. The DLPC410 only supports the full bus (maximum bandwidth) for this DMD. MODE_A/B should be tied low (GND) as indicated in the DLPLCR95EVM design files. There are no other valid settings for MODE_A/B for the DLP9500 DMD with the DLPC410 controller.

https://www.ti.com/tool/DLPLCR95EVM

https://www.ti.com/product/DLPC410

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DLP9500: MODE_A(J1)/MODE_B(G1) pins