https://e2e.ti.com/support/dlp-products-group/dlp/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673508/dlpdlcr471tpevm-can-t-find-jtag-flash-programmer/6451738Sun, 16 Aug 2026 02:47:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9e822dd5-cdea-44ed-85f8-a149bc334ae6Kevin RiveraHi Evan, Thank you for your interest in DLP Technology! We will look into this manner and respond as soon as we can. Thank you, Kevin Riverahttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673044/dlpdlcr3010evm-g2-dlpdlcr3010evm-g2-evaluation/6451737Sun, 16 Aug 2026 02:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:554a8c8c-3dd0-42f8-bb10-a4d552d065f8Kevin RiveraHi Michael, Thank you for your interest in DLP Technology! In the DLPDLCR3010EVM-G2 User Guide Table 1, these values can be found. Throw ratio 1.2 This means if you wish to project an image that is 16&quot; wide, the projector would have to be 19&quot; away Optical offset of 100% The mechanical drawings of the EVM can be found on the Reference Design linked to this EVM TIDA-01571 . Gerber, CAD, and assembly drawings are on this page. The minimum focus distance is 5 inches The optical engine is mounted directly onto the EVM it self. This could be removed but I would not advice to doing this as it could damage the EVM and cease operations. If you need any more information regarding the optical engine, I would recommend reaching out to the optical engine manufacturer directly. Thank you, Kevin Riverahttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673508/dlpdlcr471tpevm-can-t-find-jtag-flash-programmerSat, 15 Aug 2026 20:49:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:472e36b9-a0e3-481f-8c58-68c962eed140Evan FieldingPart Number: DLPDLCR471TPEVM Hello, Where can I find the JTAG Flash Programmer for the DLPDLCR471TPEVM projector?DLPDLCR471TPEVMhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1670918/dlpdlcr160cpevm-to-display-a-continuously-live-updating-graphic/6451713Sat, 15 Aug 2026 13:42:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0e5ff7c5-0ac6-42df-8bd3-6fad9098f404Kevin RiveraHello, The DLPDLCR160CPEVM can not do dynamic content/streaming but it can swap between pre-stored splash images. With your use case of continuous streaming content while keeping a compact projector, we have two recommendations: Mirior Portable Projector Commercially available compact projector with Wi-Fi and HDMI streaming capability. Designed with DLP Technology Lower cost DLPDLCR3010EVM-G2 DLP EVM with HDMI compatibility Expanded range in control of projection (Brightness control through EVM GUI) Higher cost For your use case, I would recommend the Mirior projector, as it available at a lower cost and you can implement it directly. Please let me know if you have any questions! Thank you, Kevin Riverahttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673431/dlp9000-section-7-6-electrical-character-pattern-rate/6451597Fri, 14 Aug 2026 21:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:052ec955-85e1-4452-a2bd-103b1983eda8Aaron BlackHello Jonathan, Thank you for coming to E2E! I am checking with my internal team and someone should respond shortly with a response! I will be unavailable to respond next week. Best, Aaronhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1669690/dlpc900-dlpc900-i2c-bus-hang-scl-sda-held-low-in-dual-dlpc900-dlp9000-system-during-video-input-config---seeking-guidance/6451557Fri, 14 Aug 2026 20:55:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8b4913d2-f45c-4aad-af3b-18695268c954Aaron BlackHello Bai Bai, I do not think you should be disabling this. [quote userid=&quot;708831&quot; url=&quot;~/support/dlp-products-group/dlp/f/dlp-products-forum/1669690/dlpc900-dlpc900-i2c-bus-hang-scl-sda-held-low-in-dual-dlpc900-dlp9000-system-during-video-input-config---seeking-guidance&quot;]4. We deliberately **disable the &quot;wait-for-idle before write&quot; feature** (the pre-write polling that reads main status register 0x22 to detect whether the DLPC900 is still busy, as a way to tolerate clock stretching). Instead, we rely purely on a fixed delay between successive I2C transactions.[/quote] The power-up and power-down timing is controlled by the power ICs. If these timings are followed the controller is almost always safe to perform a hardware reset - the only exception is if the mirrors cannot be parked. A recommended recovery procedure is to utilize a software reset, if possible, and a hardware reset, if necessary. Best, Aaronhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1672242/dlplcr4500evm-the-image-projected-by-the-dlp4500-has-a-lot-of-white-spots/6451501Fri, 14 Aug 2026 19:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0c33d254-012e-4031-8663-8b70c38d1b00Aaron BlackHello Yanjie, This seems like - from the error you&#39;re seeing in the GUI - the frame buffer is frozen. This should get cleared in the next buffer swap but does this stay on after some time as the &#39;Auto Update Status&#39; is checked. Was this board purchased from us or designed yourself? If it was purchased, could you advise what was done previously as well? Was this always the case? Best, Aaronhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1671661/dlpc900-miscommunication-between-the-dmd-and-controller/6451478Fri, 14 Aug 2026 19:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a1087495-1f11-4555-b084-909522f7a328Aaron BlackHello Sahar, Could you take a look at the indication of the device at the back of the DLPLCR65EVM? I&#39;m wondering if this part is actually a DLP6500 or not. You can utilize the Zero Insertion Force socket as well and just take it out of the socket instead but please do replace this. Please also ensure the connections on flex cable are making good connections by ensuring the screws are holding tightly to the board on both ends. Best, Aaronhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1670175/dlpc3479-screen-flickering-error-occurs-during-8-bit-image-projection/6451468Fri, 14 Aug 2026 19:19:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5a424233-b6a2-42a2-8b1a-96468bba389fAaron BlackHello Alex, In summary: Flickering in Test Pattern Generation (Color Ramp) Flickering in Splash Images (seen in 8-bit images) Normal operation in Internal Pattern (8-bit stripe patterns) Replacing out specific date-code batches DLPC3479 controllers fixed this issue Could you help me understand a few things? What was seen? Try and send us that video again, I&#39;m curious if it was a half-image seen - this would indicate a single controller issue. What version of software are you running? What was the amount of failures and replaced devices? I&#39;ll likely include some members of my team from the field that could help understand your situation a little better, but please help us understand this further. Best, Aaronhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673431/dlp9000-section-7-6-electrical-character-pattern-rateFri, 14 Aug 2026 16:51:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f3a9317b-fffa-4790-a428-8c4af61a90f0Jonathan MesserPart Number: DLP9000 I am trying to understand what the test condition pattern rate was used for to supply power dissipations in Section 7.6. Is it 9,523 Hz, 1-Bit binary pattern, and Global Reset Mode?DLP9000https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673236/dlpc8445-dlpc8445-intermittent-flicker-when-updating-write-image-pixel-contrast-f7h-and-question-about-de-gamma-table-for-dimming-controlFri, 14 Aug 2026 05:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5c6f35d5-312f-4980-8e3d-66190e2af207yg hongPart Number: DLPC8445 Hello TI Team, We are currently developing a brightness control feature that adjusts projector brightness according to a user setting. For this implementation, we are evaluating the use of the Write Image Pixel Contrast (F7h) command to change image brightness. During testing, we observed an intermittent flicker issue when the contrast value is updated around the default setting point. For example: 99% → 100% 100% → 101% The flickering does not occur on every update, but it has been observed at a relatively high frequency during repeated testing. We would like to understand whether this behavior is expected when using the Write Image Pixel Contrast (F7h) command, or if additional configuration is required. Questions Is intermittent flickering during contrast updates a known characteristic or limitation of the Write Image Pixel Contrast (F7h) command? Are there any additional parameters, initialization sequences, or configurations that should be applied when using this command? Is there a recommended method for implementing a smooth dimming/brightness control feature on DLPC8445? Can the De-gamma Table be used to implement dimming control (brightness adjustment based on user settings or ambient light conditions)? If the De-gamma Table can be used for dimming control: Is this an intended use case? Are there any recommended implementation guidelines or application notes? Are there limitations or image quality concerns when updating the De-gamma Table dynamically? Any related application notes, reference designs, or implementation recommendations would be greatly appreciated. Thank you for your support. Best Regards, yg.HongDLPC8445https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1669690/dlpc900-dlpc900-i2c-bus-hang-scl-sda-held-low-in-dual-dlpc900-dlp9000-system-during-video-input-config---seeking-guidance/6450552Fri, 14 Aug 2026 01:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:81c8462d-c791-403a-b209-de99591ec226bai baiDear Faizan, I wanted to follow up on my previous email regarding the DLPC900 I2C bus lock-up issue, as I have not yet received a response. Since then, we have continued testing and can provide the following additional information: We attempted a software-based I2C bus recovery sequence (manually toggling SCL via GPIO to release the stuck bus), but this was not effective — the DLPC900 continues to hold SCL low regardless. Adding a delay between commands reduces the frequency of the issue but does not eliminate it entirely. The lock-up still occurs occasionally during long-duration operation. To be clear about the nature of the problem: once the DLPC900 enters this state, all I2C communication becomes permanently impossible . The SCL line stays low indefinitely with no recovery. This means we cannot send any commands to the DLPC900 — including stopping output, parking the DMD, or triggering a software reset — through the I2C interface. At this point, our questions are: Is this a known issue or errata with the DLPC900&#39;s I2C interface? Is a hardware reset of the DLPC900 safe to perform when a DMD is connected and powered? Are there any other recommended recovery procedures? This issue is significantly impacting our system&#39;s ability to operate reliably. We would greatly appreciate your guidance. Thank you for your time. Best regards, Bai Baihttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1669975/dlp9000x-streaking-reflected-pattern-from-dmd/6450444Thu, 13 Aug 2026 21:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:03d77b8c-866d-4eeb-8036-9567a7e4b304Keyu ChenGood afternoon Tristan, Thank you so much for getting back to me! Sorry for the late response. I had been out of office since last Thursday and just got back. Your advice on operating the laser above the threshold did seem to fix part of the issue. After adjusting my laser power to ~1W total (from the single-digit mW power before), it seems that I was able to separate out the &quot;streak&quot; from the main beam. Unfortunately, the image reflected by the DMD still slowly lost its crisp edges and overall shape as it traveled. For example, a circle slowly changed into an oblong shape: close distance: far distance: I can still make out the &quot;streak&quot; part in the first image to the bottom left of the circle. However, since the image mostly maintained its shape, I tried to move on by setting up an additional 4f system after the DMD (to shrink the beam by 3x) and use an iris to filter out unneeded light. Compared to my prior attempts using the lower laser power, I do see an improvement in my ability to separate out the &quot;streak&quot; using the iris once I increased the power, shown below: low power: high power: However, the image coming out of the 4f system lost its integrity way faster compared to without the 4f system. There was also a more obvious trend of how the image deformed, as I can tell the image slowly somewhat smearing towards the bottom left, the same direction as the streak. I observed this after I made sure the two lenses I used for the 4f system were optimally aligned, confirming with a shearing interferometer. Here are two videos showing 1. a fully on DMD&#39;s pattern and 2. an arrow pattern: e2e.ti.com/.../Full_5F00_Smearing.MOV e2e.ti.com/.../Arrow_5F00_Smearing.MOV If you are able to provide any insight regarding why this behavior is occurring, please let me know. Thank you again for your time! Sincerely, Keyu Chenhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1670918/dlpdlcr160cpevm-to-display-a-continuously-live-updating-graphic/6450122Thu, 13 Aug 2026 17:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d1c7945c-b195-4beb-9e98-694a35813274Kevin RiveraHello, Thank you for your interest in DLP technology! Please give me some time to investigate this and I will follow up when I have an answer. Best Regards, Kevin Riverahttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1673044/dlpdlcr3010evm-g2-dlpdlcr3010evm-g2-evaluationThu, 13 Aug 2026 12:55:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1ee15c24-d579-4f43-8869-0681b7ec6c07Michael FischerPart Number: DLPDLCR3010EVM-G2 Could TI provide contact information for the eProtech optical engine used in the DLPDLCR3010EVM-G2? Specifically we are looking for: - throw distance vs image size chart - optical offset diagram - mechanical drawing - minimum focus distance - remote mounting capabilityTIDA-01571DLPDLCR3010EVM-G2https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1669469/dlplcrc900devm-trigger-unstable-from-dlplcrc900devm-board/6448671Wed, 12 Aug 2026 17:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:63681bc2-52d4-4619-8928-9803441e982aCallum JonesHi Aaron, Comparing with another evaluation module board we have, the trigger has the same behaviour in a working system, so that can&#39;t be the problem. By swapping components we&#39;ve isolated the problem to our trigger cable and/or camera, so I&#39;m looking into those now. From what I can tell and following the PLM user&#39;s guide the PLM and control board are operating as expected. Thanks for your help, Callumhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1669469/dlplcrc900devm-trigger-unstable-from-dlplcrc900devm-board/6447514Tue, 11 Aug 2026 21:36:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:342ba4b1-ece4-4c44-98de-1433ce4a7238Aaron BlackHello Callum, A picture of the GUI replicating what you are doing would be very helpful here! I would simply advise that you utilize the latest User&#39;s Guide for the PLM on the tirex page. Best, Aaronhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1672242/dlplcr4500evm-the-image-projected-by-the-dlp4500-has-a-lot-of-white-spots/6446955Tue, 11 Aug 2026 14:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a2c4097f-63a9-4f39-ad67-364e8fc3f579Tristan BottoneHello Yanjie Li, Thank you for reaching out and using the E2E forums! An expert from our team will review the thread and get back to you shortly. Best Regards, Tristan Bottonehttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1672242/dlplcr4500evm-the-image-projected-by-the-dlp4500-has-a-lot-of-white-spotsTue, 11 Aug 2026 09:16:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4d28554d-7ff8-4b2e-8b80-50422e1c0c01yanjie LiPart Number: DLPLCR4500EVM Other Parts Discussed in Thread: DLP4500 I am connecting the DLP4500 using a USB cable, and no matter which projection mode I use, the issue shown in the picture occurs, with noise overlaying the pattern. See the pictures and videos in the attachment.DLP4500DLPLCR4500EVMTest &amp; Measurementhttps://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1671743/ts5a23166-ts5a23166/6445899Mon, 10 Aug 2026 19:58:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:55218b96-f75b-4d4c-8183-f6142bf96a3dCaroline OrmondHello Jingguo, Your logic pins are tied high to VCC, GND pin grounded, and a decoupling cap on VCC. While the TS5A21366 can operate without external components, decoupling caps are recommended on all power supplies. The 1uF should work fine with no issues. Best, Caroline