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Hi
I am concerned the content in 8.5.3 of DLPC910 datasheet as shown below
"Disabling the watchdog is not recommended unless the user
ensures that a mirror clocking pulse to the entire DMD occurs within 10 seconds.During the time when the DLPC910 is in idle mode or is not operating, it is recommended to exercise the DMD mirrors by continuously loading
an alternating all on all off patterns."if watchdog is enable but our FPGA (Xilinx Kintex Ultra) doesn't "exercise the DMD mirrors by continuously loading an alternating all on all off patterns."
then what is going to happen in DLPC910 or DMD module after DLPC910 being in idle for certain time ?
Why I ask this question is because I observed image overlap constantly on DMD when I do bitmap display as following sequence.
execute dmd reset and wait for done of dmd training
display bitmap A on DMD <- everything is OK (repeat bitmap display quickly)
display bitmap A on DMD <- everything is OK (repeat bitmap display quickly)
.........
display bitmap A on DMD <- everything is OK (repeat bitmap display quickly)
wait about 1 min <- DLPC910 is in idle, FPGA does not exercise the DMD mirrors
display bitmap B on DMD <- Here, I observe image overlap
Looks like image overlay on DMD is related to DLPC910's idle....
"exercise the DMD mirrors by continuously loading an alternating all on all off patterns." is a MUST to do by FPGA?
Thank you very much!
Zan