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DLPC900: DMD chip power failure

Part Number: DLPC900
Other Parts Discussed in Thread: DLP6500FYE

Hi,

DMD can't light up after power on.

HW:  DLPC900 + 6500 No HDMI. DMD chip inspection is normal (using EVM).

DMD Board: 3.3V Power rail is normal

     EN_OFFSET pin : 0V     (Without dmd  and  power up to 3.3v  VOFFSET / BIAS / VRESET is work fine)

DLPC  Debug Log:

[2021-01-06 10:29:34.135]# RECV ASCII>
Bootloader Version 3.0
Jumping to application ...

Debug opened on URT0
Memory test cc = 1
API version: 05.00.01
App version: 05.00.01
Configuration layout versions:
Seq Map: 44.21.0100
SW Map: 44.21.0000
I2C Cmd Slave Address 34


[2021-01-06 10:29:39.596]# RECV ASCII>
DRAM memory pool 004025E8 200025E8


[2021-01-06 10:29:39.692]# RECV ASCII>
ptn_seq.c (1014) >> Failed
Illumination: Transition to operating mode
DMD comm error in DMD_Power()
Illumination: Transition to standby

Measure the following IO status (connected to dmd chip):

 

PWRDNE + RESETZ : 3.3V

RESETZ_OEZ: 3.3V

RESET_IRQZ: 0V     (Without DMD 3.3V)

 

Looking forward to your reply

best regards

Byron

  • Hi Byron,

    "DMD comm error in DMD_Power()" error is reported when controller is not receiving response from DMD.

    1. Can you check if DMD is mounted properly.
    2. Check for Flex cable connection. Any damage.
    3. Change Controller Board / DMD board and see if same problem is reported.

    We need to figure out issue with DMD Board or Controller Board.

    Was this hardware properly working before and reporting issue now?

    Thanks,
    Shivakumar

  • Shivakumar,

    Glad to receive your help again.

    1. Can you check if DMD is mounted properly.

    yes


    2. Check for Flex cable connection. Any damage.

    Connection should be fine  


    3. Change Controller Board / DMD board and see if same problem is reported.

    This is the new version of the circuit,the two circuits are the same.

    Could you please tell "DMD_Power()" the related IO and seq, I may be able to find the reason.

     

    Looking forward to your reply

    Byron

     

  • Hi Byron,

    Referring to DLP6500FYE Datasheet,

    On Page 6 - SERIAL CONTROL, CLOCKS, SERIAL COMMUNICATIONS PORT (SCP) pins are responsible for Initial DMD Communication.
    Page 10 lists Power supply pins.

    Page 39 Explains DMD Power up and Down sequence. This sequence is taken care by Controller Firmware.

    In few cases, Reconnecting Flex Cable and Carefully removing DMD from its Socket and Re inserting properly has resolved DMD Power error.
    Make sure to Remove power and follow ESD Precautions before touching DMD board and Removing DMD.  

    If Extra DMD board is available, please connect it and check for the error.

    Thanks,
    Shivakumar

  • Shivakumar,

    thank you for your reply.

    So I guess the order of DMD initialization is :

    STEP1:  (DLPC launch)SCP communication and then if DMD responds correctly  TO STEP2

    STPE2:  .....

    STEP3:  .....

    could you give me more details?

    Byron

  • Hi Byron,

    Here is the top level DMD power up steps.

    DMD Init Sequence
    1. Configure and Init SSP port
    2. Configure DMD PLL and Output Clock
    3. Configure DMD Power, Offset and Reset voltage.
    4. Enable DMD Power
    5. Read DMD chip ID through SSP Interface.
    6. At this stage if ID is not returned, error is reported.
    7. If ID is returned properly, other initializations steps will be executed.

    If DMD communication is proper, you will get similar debug logs

    Illumination: Transition to operating mode
    Configuring LED Enable and PWM Driver...
    PWM Driver initialized...
    Setting PWM Drive Levels...
    Controller Product ID: 06
    DMD Type: 7a
    DMD Product ID : 24
    System Mode: There are 1 defined System Modes
    System Mode: System Mode 0 supports 2D
    Sysmon: Executing Default Batch file

    Thanks,
    Shivakumar

  • Hi Shivakumar,

    DMD Init Sequence
    1. Configure and Init SSP port
    2. Configure DMD PLL and Output Clock
    3. Configure DMD Power, Offset and Reset voltage.   (Now this is not right,because DMD EN_OFFSET pin = 0V   )

    4. Enable DMD Power  

    In the above 4 steps, what signals need to be provided by DLPC900 correctly?

    Byron

  • Hi Byron,

    For DLP6500FYE DMD, Offset and Reset voltages are not needed to be enabled while initializing DMD. They get enabled while sending pixel values to DMD Mirrors. Enabling these voltages are internally managed by DMD.

    DLPC900 will just send commands through Serial interface (SSP). DMD decodes these commands and responds to controller.

    Checking SSP port signals should be helpful. If you have working hardware, you can compare the captured result.

    Let me also check with my team for further debugging steps.

    Can you share good pictures of Controller Board, Flex cable and DMD Board for visual checking.

    Thanks,
    Shivakumar

  • Shivakumar,

    Thank you very much, the problem really lies in these two signals.

    Byron