TMS320C5517: Procedure of Entering IDLE3 on TMS320C5517

Hi Nomo,

Hi,

I am not 100% certain what will happen if you do not stop the DMA before entering IDLE3.

In IDLE3 mode, the clocks and PLL are stopped, so if you do manage to get into IDLE3, the DMA will not have a clock and will no longer function.

I am not certain, however, if the DMA will prevent you from entering IDLE3 in the first place. My gut feeling is that it will enter IDLE3, but there may still be some issue.

If you try to idle the MPORT (Memory port), it will not go into idle mode if the USB CDMA or DMA controllers are not idled (DMA controllers, and USB CDMA must not be accessing DARAM or SARAM). But the documentation and CSL example for IDLE3 do not actually IDLE the MPORT. Instead they stop the peripheral clocks with the clock gate. Then stop the PLL and disable the System clock with the clock gate. Then idle only the CPU and FFT hardware accelerator ports by setting the CPU idle control bit and the FFT hardware accelerator idle control bit with the few remaining system clocks before the clock stops.

There could be an issue getting into IDLE3 if the DMA interrupts continue to fire when trying to enter IDLE3, but I suppose you could mask the DMA interrupt to avoid this.

Finally, if a peripheral's clock is stopped while being accessed, the access may not occur completely, and could potentially lock-up the device... So that might be an issue when waking up from IDLE3.

It is interesting that the TRM documentation for IDLE2 also includes step 1: wait for completion of all DMA transfers, but there is an example in the CSL that keeps the DMA servicing I2S traffic while the CPU is in IDLE2 sleep mode. The difference between IDLE2 and IDLE3 is that the PLL and clocks keep running in IDLE2, so the DMA continues to receive a clock. In IDLE3, the PLL and Clocks are stopped, so when waking up, the PLL must spend 4ms to relock before providing a system clock.

Check out the CSL examples in c55_csl\ccs_v6.x_examples\power:
- CSL_PowerMgmt_IDLE2_DMA_Example
- CSL_PowerManagement_IDLE3_Example
Download the latest CSL here: http://www.ti.com/tool/sprc133

Do you have a reason not to wait for the DMA to stop before entering IDLE3?

What is your sleep requirement and are you aware of the RTC-only mode (lowest power, core supply is off, but requires reboot so slowest to wake up from).

Hope this helps,
Mark