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CCS/TMDX5535EZDSP: Running from SPI FLASH

Part Number: TMDX5535EZDSP

Tool/software: Code Composer Studio

Hi everybody!
I'm working with I2S via DMA interrupt. I'm testing the program on EZDSP5535 equipment.
When running from the CCS in the debug mode, everything works fine. The sound passes from an external source (I2S0) to a loudspeaker (I2S2) and back.
However, when I start the applicationwith with the SPI FLASH, the DMA interrupt does not occur.
Please help me solve the problem.

Aleksandr.

2555.main.c

/**
 * main.c
 */
#include "string.h"
#include "main.h"
//#include "ezdsp5535.h"
//#include "ezdsp5535_led.h"

extern void VECSTART(void); // defined in vector table
CSL_IRQ_Dispatch     dispatchTable;
const PLL_Config pllCfg_75MHz       = {0x88ED, 0x8000, 0x0806, 0x0000};
const PLL_Config pllCfg_100MHz      = {0x8BE8, 0x8000, 0x0806, 0x0000};
const PLL_Config pllCfg_120MHz      = {0x8E4A, 0x8000, 0x0806, 0x0000};


ProgramPLL()
{
    PLL_Obj                 pllObj;
    PLL_Config              *configInfo;
    PLL_Handle              hPll;
    Uint32                  pllInstId;
    int i;

    pllInstId = 0;
    PLL_init(&pllObj,pllInstId);
    hPll = &pllObj;
    PLL_reset(hPll);

   configInfo = (PLL_Config *)&pllCfg_100MHz;
   PLL_config(hPll, configInfo);
   for(i=0;i<100;i++);
   PLL_enable(hPll);
   for(i=0;i<100;i++);

}


#define led_green       17
#define led_red         16
#define led_yellow      15
#define led_blue        14

CSL_GpioObj     GpioObj;
CSL_GpioObj     *hGpio;
void LedInit()
{
    int i;
    CSL_Status           status;
    CSL_GpioPinConfig    config;

    hGpio = GPIO_open(&GpioObj, &status);

    for(i=14; i<18; i++)
    {
        config.pinNum    = i;
        config.direction = CSL_GPIO_DIR_OUTPUT;
        config.trigger   = CSL_GPIO_TRIG_CLEAR_EDGE;
        GPIO_configBit(hGpio,&config);
        GPIO_write(hGpio, i, 1);
    }
}
void LedON(int number)
{
    GPIO_write(hGpio, number, 0);
}
void LedOFF(int number)
{
    GPIO_write(hGpio, number, 1);
}

//-----------------------------------------------------------------------------
void main(void)
{
    int i = 0;
    Uint32 count = 0;
    int on_off = 0;

    CSL_SYSCTRL_REGS->PCGCR1 = 0x0000;
    CSL_SYSCTRL_REGS->PCGCR2 = 0x0000;


    DeviceInit();

    Uint16 signal[FRAME_LENGTH] = {
            0x0000, 0x10b4, 0x2120, 0x30fb, 0x3fff, 0x4dea, 0x5a81, 0x658b,
            0x6ed8, 0x763f, 0x7ba1, 0x7ee5, 0x7ffd, 0x7ee5, 0x7ba1, 0x76ef,
            0x6ed8, 0x658b, 0x5a81, 0x4dea, 0x3fff, 0x30fb, 0x2120, 0x10b4,
            0x0000, 0xef4c, 0xdee0, 0xcf06, 0xc002, 0xb216, 0xa57f, 0x9a75,
            0x9128, 0x89c1, 0x845f, 0x811b, 0x8002, 0x811b, 0x845f, 0x89c1,
            0x9128, 0x9a76, 0xa57f, 0xb216, 0xc002, 0xcf06, 0xdee0, 0xef4c,
            0x0000, 0x10b4, 0x2120, 0x30fb, 0x3fff, 0x4dea, 0x5a81, 0x658b,
            0x6ed8, 0x763f, 0x7ba1, 0x7ee5, 0x7ffd, 0x7ee5, 0x7ba1, 0x76ef,
            0x6ed8, 0x658b, 0x5a81, 0x4dea, 0x3fff, 0x30fb, 0x2120, 0x10b4,
            0x0000, 0xef4c, 0xdee0, 0xcf06, 0xc002, 0xb216, 0xa57f, 0x9a75,
            0x0000, 0x10b4, 0x2120, 0x30fb, 0x3fff, 0x4dea, 0x5a81, 0x658b,
            0x6ed8, 0x763f, 0x7ba1, 0x7ee5, 0x7ffd, 0x7ee5, 0x7ba1, 0x76ef,
            0x6ed8, 0x658b, 0x5a81, 0x4dea, 0x3fff, 0x30fb, 0x2120, 0x10b4,
            0x0000, 0xef4c, 0xdee0, 0xcf06, 0xc002, 0xb216, 0xa57f, 0x9a75,
            0x9128, 0x89c1, 0x845f, 0x811b, 0x8002, 0x811b, 0x845f, 0x89c1,
            0x9128, 0x9a76, 0xa57f, 0xb216, 0xc002, 0xcf06, 0xdee0, 0xef4c,
            0x0000, 0x10b4, 0x2120, 0x30fb, 0x3fff, 0x4dea, 0x5a81, 0x658b,
            0x6ed8, 0x763f, 0x7ba1, 0x7ee5, 0x7ffd, 0x7ee5, 0x7ba1, 0x76ef,
            0x6ed8, 0x658b, 0x5a81, 0x4dea, 0x3fff, 0x30fb, 0x2120, 0x10b4,
            0x0000, 0xef4c, 0xdee0, 0xcf06, 0xc002, 0xb216, 0xa57f, 0x9a75
        };
    while(i<5){
        if(spkr_write_block(signal, signal))
            i++;
    }

    while (true)
    {
        F_read_block(midl_buf_L, midl_buf_R);
        spkr_write_block(midl_buf_L, midl_buf_R);

        count++;
        if(count >= 50000)
        {
            if(on_off){
                LedOFF(led_green);
                on_off = 0;
            }
            else{
                LedON(led_green);
                on_off = 1;
            }
            count = 0;
        }
    }

}


//*****************************************************************************
// DeviceInit
//*****************************************************************************
void DeviceInit()
{
    Int16 i;
    Uint16 prcr;

    //buf clear
    for(i = 0; i< FRAME_LENGTH; i++)
    {
        midl_buf_L[i]           = i;
        midl_buf_R[i]           = i;
    }
    for(i = 0; i< FRAME_LENGTH*2; i++)
    {
        bufN_WL[i]   = 0x0000;
        bufN_WR[i]   = 0x0000;
        bufN_RL[i]   = 0x0000;
        bufN_RR[i]   = 0x0000;

        bufF_WL[i]   = 0x0000;
        bufF_WR[i]   = 0x0000;
        bufF_RL[i]   = 0x0000;
        bufF_RR[i]   = 0x0000;
    }
    IRQ_init(&dispatchTable, 0);
    IRQ_globalDisable();
    IRQ_disableAll();
    IRQ_clearAll();

    Uint32 irq = (Uint32)&VECSTART;
    IRQ_setVecs(irq);

    //IRQ_clear(DMA_EVENT);

    // Reset all peripherals
    CSL_SYSCTRL_REGS->PSRCR = 0x0020;
    CSL_SYSCTRL_REGS->PRCR = 0x00BB;
    do
    {
        prcr = CSL_SYSCTRL_REGS->PRCR;
    } while (prcr != 0);


    CSL_FINST(CSL_SYSCTRL_REGS->EBSR, SYS_EBSR_PPMODE, MODE6);
    CSL_FINST(CSL_SYSCTRL_REGS->EBSR, SYS_EBSR_SP1MODE, MODE0);
    CSL_FINST(CSL_SYSCTRL_REGS->EBSR, SYS_EBSR_SP0MODE, MODE1);

    CSL_SYSCTRL_REGS->PCGCR1 = 0x1c02;
    CSL_SYSCTRL_REGS->PCGCR2 = 0x0003;

    ProgramPLL();
    LedInit();

    //Init devices
    i2c_init();
    Wait(300);
    DmaInit();

    I2sDmaN_init();
    I2sDmaF_init();

    i2sN_init();
    i2sF_init();

    aic_init();
    IRQ_globalEnable();

    if(irq == 327168) LedON(led_blue);
}



//*****************************************************************************
// DmaInit
//  Description: Initializes DMA, enables DMA interrupts
//*****************************************************************************
void DmaInit()
{
    Uint16 ifrValue;

    IRQ_disable(DMA_EVENT);
    IRQ_clear(DMA_EVENT);

    IRQ_plug(DMA_EVENT, &DmaIsr);
    DMA_init();
    IRQ_enable(DMA_EVENT);
}
//-----------------------------------------------------------------------------

//*****************************************************************************
//  void i2s_init()
//****************************************************************************
void i2sN_init()
{
    CSL_I2sHandle hI2sN;
    I2S_Config      hwConfig;

    /* Open the device with instance 2 */
    hI2sN = I2S_open(I2S_INSTANCE2, DMA_INTERRUPT, I2S_CHAN_STEREO);

    /* Set the value for the configure structure */
    hwConfig.dataType           = I2S_STEREO_ENABLE;
    hwConfig.loopBackMode       = I2S_LOOPBACK_DISABLE;
    hwConfig.fsPol              = I2S_FSPOL_LOW;
    hwConfig.clkPol             = I2S_RISING_EDGE;
    hwConfig.datadelay          = I2S_DATADELAY_ONEBIT;
    hwConfig.datapack           = I2S_DATAPACK_ENABLE;
    hwConfig.signext            = I2S_SIGNEXT_DISABLE;
    hwConfig.wordLen            = I2S_WORDLEN_16;
    hwConfig.i2sMode            = I2S_SLAVE;
    hwConfig.FError             = I2S_FSERROR_DISABLE;
    hwConfig.OuError            = I2S_OUERROR_DISABLE;
    hwConfig.clkDiv             = I2S_CLKDIV16;
    hwConfig.dataFormat         = I2S_DATAFORMAT_DSP;
    hwConfig.fsDiv              = I2S_FSDIV16;

    /* Configure hardware registers */
    if(I2S_setup(hI2sN, &hwConfig) != CSL_SOK) LedON(led_blue);
    if(I2S_transEnable(hI2sN, TRUE) != CSL_SOK) LedON(led_blue);
    hI2sN->firstRead = FALSE;
}
//-----------------------------------------------------------------------------

void i2sF_init()
{
    CSL_I2sHandle hI2sF;
    I2S_Config      hwConfig;

    /* Open the device with instance 2 */
    hI2sF = I2S_open(I2S_INSTANCE0, DMA_INTERRUPT, I2S_CHAN_STEREO);

    /* Set the value for the configure structure */
    hwConfig.dataType           = I2S_STEREO_ENABLE;
    hwConfig.loopBackMode       = I2S_LOOPBACK_DISABLE;
    hwConfig.fsPol              = I2S_FSPOL_LOW;
    hwConfig.clkPol             = I2S_RISING_EDGE;
    hwConfig.datadelay          = I2S_DATADELAY_ONEBIT;
    hwConfig.datapack           = I2S_DATAPACK_ENABLE;
    hwConfig.signext            = I2S_SIGNEXT_DISABLE;
    hwConfig.wordLen            = I2S_WORDLEN_16;
    hwConfig.i2sMode            = I2S_SLAVE;
    hwConfig.FError             = I2S_FSERROR_DISABLE;
    hwConfig.OuError            = I2S_OUERROR_DISABLE;
    hwConfig.clkDiv             = I2S_CLKDIV16;
    hwConfig.dataFormat         = I2S_DATAFORMAT_DSP;
    hwConfig.fsDiv              = I2S_FSDIV16;

    /* Configure hardware registers */
    if(I2S_setup(hI2sF, &hwConfig) != CSL_SOK) LedON(led_blue);
    if(I2S_transEnable(hI2sF, TRUE) != CSL_SOK) LedON(led_blue);
    hI2sF->firstRead = FALSE;
}


//*****************************************************************************
// I2sDmaInit
// Configures and starts I2S with DMA
//*****************************************************************************
void I2sDmaN_init()
{
    CSL_DMA_Config dmaConfig;
    CSL_Status status;


    // Configure DMA ch4 for I2S left write (�� �������)
    dmaConfig.pingPongMode  = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode      = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen      = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger       = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt        = CSL_DMA_EVT_I2S2_TX;
    dmaConfig.dmaInt        = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir       = CSL_DMA_WRITE;
    dmaConfig.trfType       = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen       = FRAME_LENGTH_10*4; // two frames
    dmaConfig.srcAddr       = (Uint32)bufN_WLPi;
    dmaConfig.destAddr      = (Uint32)&CSL_I2S2_REGS->I2STXLT0;

    dmaNLeftTxHandle = DMA_open(DMA_N_CHAN_TX_L, &dmaObj0,&status);
    if(DMA_config(dmaNLeftTxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaNLeftTxHandle) != CSL_SOK) LedON(led_blue);

    // Configure DMA ch5 for I2S right write (�� �������)
    dmaConfig.pingPongMode = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode     = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen     = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt       = CSL_DMA_EVT_I2S2_TX;
    dmaConfig.dmaInt       = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir      = CSL_DMA_WRITE;
    dmaConfig.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen      = FRAME_LENGTH_10*4;  // two frames
    dmaConfig.srcAddr      = (Uint32)bufN_WRPi;
    dmaConfig.destAddr     = (Uint32)&CSL_I2S2_REGS->I2STXRT0;

    dmaNRightTxHandle = DMA_open(DMA_N_CHAN_TX_R, &dmaObj1,&status);
    if(DMA_config(dmaNRightTxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaNRightTxHandle) != CSL_SOK) LedON(led_blue);

    // Configure DMA ch6 for I2S left read (�� ���������)
    dmaConfig.pingPongMode  = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode      = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen      = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger       = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt        = CSL_DMA_EVT_I2S2_RX;
    dmaConfig.dmaInt        = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir       = CSL_DMA_READ;
    dmaConfig.trfType       = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen       = FRAME_LENGTH*4; // two frames
    dmaConfig.srcAddr       = (Uint32)&CSL_I2S2_REGS->I2SRXLT0;
    dmaConfig.destAddr      = (Uint32)bufN_RLPi;

    dmaNLeftRxHandle = DMA_open(DMA_N_CHAN_RX_L, &dmaObj2,&status);
    if(DMA_config(dmaNLeftRxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaNLeftRxHandle) != CSL_SOK) LedON(led_blue);

    // Configure DMA ch7 for I2S right read (�� ���������)
    dmaConfig.pingPongMode = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode     = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen     = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt       = CSL_DMA_EVT_I2S2_RX;
    dmaConfig.dmaInt       = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir      = CSL_DMA_READ;
    dmaConfig.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen      = FRAME_LENGTH*4;  // two frames
    dmaConfig.srcAddr      = (Uint32)&CSL_I2S2_REGS->I2SRXRT0;
    dmaConfig.destAddr     = (Uint32)bufN_RRPi;

    dmaNRightRxHandle = DMA_open(DMA_N_CHAN_RX_R, &dmaObj3,&status);
    if(DMA_config(dmaNRightRxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaNRightRxHandle) != CSL_SOK) LedON(led_blue);

    flagN_RI = 0;
    flagN_WI = 0;
}
//------------------------------------------------------------------

void I2sDmaF_init()
{
    CSL_DMA_Config dmaConfig;
    CSL_Status status;


    // Configure DMA ch0 for I2S left write
    dmaConfig.pingPongMode  = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode      = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen      = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger       = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt        = CSL_DMA_EVT_I2S0_TX;
    dmaConfig.dmaInt        = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir       = CSL_DMA_WRITE;
    dmaConfig.trfType       = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen       = FRAME_LENGTH*4; // two frames
    dmaConfig.srcAddr       = (Uint32)bufF_WLPi;
    dmaConfig.destAddr      = (Uint32)&CSL_I2S0_REGS->I2STXLT0;

    dmaFLeftTxHandle = DMA_open(DMA_F_CHAN_TX_L, &dmaObj4,&status);
    if(DMA_config(dmaFLeftTxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaFLeftTxHandle) != CSL_SOK) LedON(led_blue);

    // Configure DMA ch1 for I2S right write
    dmaConfig.pingPongMode = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode     = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen     = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt       = CSL_DMA_EVT_I2S0_TX;
    dmaConfig.dmaInt       = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir      = CSL_DMA_WRITE;
    dmaConfig.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen      = FRAME_LENGTH*4;  // two frames
    dmaConfig.srcAddr      = (Uint32)bufF_WRPi;
    dmaConfig.destAddr     = (Uint32)&CSL_I2S0_REGS->I2STXRT0;

    dmaFRightTxHandle = DMA_open(DMA_F_CHAN_TX_R, &dmaObj5,&status);
    if(DMA_config(dmaFRightTxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaFRightTxHandle) != CSL_SOK) LedON(led_blue);

    // Configure DMA ch2 for I2S left read
    dmaConfig.pingPongMode  = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode      = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen      = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger       = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt        = CSL_DMA_EVT_I2S0_RX;
    dmaConfig.dmaInt        = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir       = CSL_DMA_READ;
    dmaConfig.trfType       = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen       = FRAME_LENGTH*4; // two frames
    dmaConfig.srcAddr       = (Uint32)&CSL_I2S0_REGS->I2SRXLT0;
    dmaConfig.destAddr      = (Uint32)bufF_RLPi;

    dmaFLeftRxHandle = DMA_open(DMA_F_CHAN_RX_L, &dmaObj6,&status);
    if(DMA_config(dmaFLeftRxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaFLeftRxHandle) != CSL_SOK) LedON(led_blue);

    // Configure DMA ch3 for I2S right read
    dmaConfig.pingPongMode = CSL_DMA_PING_PONG_ENABLE;
    dmaConfig.autoMode     = CSL_DMA_AUTORELOAD_ENABLE;
    dmaConfig.burstLen     = CSL_DMA_TXBURST_2WORD;
    dmaConfig.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfig.dmaEvt       = CSL_DMA_EVT_I2S0_RX;
    dmaConfig.dmaInt       = CSL_DMA_INTERRUPT_ENABLE;
    dmaConfig.chanDir      = CSL_DMA_READ;
    dmaConfig.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfig.dataLen      = FRAME_LENGTH*4;  // two frames
    dmaConfig.srcAddr      = (Uint32)&CSL_I2S0_REGS->I2SRXRT0;
    dmaConfig.destAddr     = (Uint32)bufF_RRPi;

    dmaFRightRxHandle = DMA_open(DMA_F_CHAN_RX_R, &dmaObj7,&status);
    if(DMA_config(dmaFRightRxHandle, &dmaConfig) != CSL_SOK) LedON(led_blue);
    if(DMA_start (dmaFRightRxHandle) != CSL_SOK) LedON(led_blue);

    flagF_RI = 0;
    flagF_WI = 0;
}
//------------------------------------------------------------------

//*****************************************************************
// Iterupt DMA
//*****************************************************************
interrupt void DmaIsr(void)
{
    CSL_Status status;
    volatile Uint16 ifrValue;

    // Clear the DMA interrupt
    ifrValue = CSL_SYSCTRL_REGS->DMAIFR;
    CSL_SYSCTRL_REGS->DMAIFR |= ifrValue;

    //Ch 4, 5 Write to SPKR
    if (ifrValue & (1<<4)){
        flagN_WI = 1;
        if(DMA_getLastTransferType (dmaNLeftTxHandle, &status)){
            flagN_WLPP = 0;
        }
        else{
            flagN_WLPP = 1;
        }
    }
    if (ifrValue & (1<<5)){
        flagN_WI = 1;
        if(DMA_getLastTransferType (dmaNRightTxHandle, &status)){
            flagN_WRPP = 0;
        }
        else{
            flagN_WRPP = 1;
        }
    }

    //Ch 6, 7 Read from MIC
    if (ifrValue & (1<<6)){
        flagN_RI = 1;
        if(DMA_getLastTransferType (dmaNLeftRxHandle, &status)){
            flagN_RLPP = 0;
        }
        else{
            flagN_RLPP = 1;
        }
    }
    if (ifrValue & (1<<7)){
        flagN_RI = 1;
        if(DMA_getLastTransferType (dmaNRightRxHandle, &status)){
            flagN_RRPP = 0;
        }
        else{
            flagN_RRPP = 1;
        }
    }

    //Ch 0, 1 Write to ������� �����
    if (ifrValue & (1<<0)){
        flagF_WI = 1;
        if(DMA_getLastTransferType (dmaFLeftTxHandle, &status)){
            flagF_WLPP = 0;
        }
        else{
            flagF_WLPP = 1;
        }
    }
    if (ifrValue & (1<<1)){
        flagF_WI = 1;
        if(DMA_getLastTransferType (dmaFRightTxHandle, &status)){
            flagF_WRPP = 0;
        }
        else{
            flagF_WRPP = 1;
        }
    }

    //Ch 2, 3 Read from ������� �����
    if (ifrValue & (1<<2)){
        flagF_RI = 1;
        if(DMA_getLastTransferType (dmaFLeftRxHandle, &status)){
            flagF_RLPP = 0;
        }
        else{
            flagF_RLPP = 1;
        }
    }
    if (ifrValue & (1<<3)){
        flagF_RI = 1;
        if(DMA_getLastTransferType (dmaFRightRxHandle, &status)){
            flagF_RRPP = 0;
        }
        else{
            flagF_RRPP = 1;
        }
    }
}
//-------------------------------------------------------------------------------

void mic_read_block(Uint16* buffer_left, Uint16* buffer_right)
{
    int i;
    Uint32* bL = (Uint32*)buffer_left;
    Uint32* bR = (Uint32*)buffer_right;
    Uint32* dmaL;
    Uint32* dmaR;

    while(flagN_RI == 0);
    flagN_RI = 0;

    if(flagN_RLPP == 1){
        dmaL = (Uint32*)(&bufN_RL[0]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bL++ = *dmaL++;
    }
    else{
        dmaL = (Uint32*)(&bufN_RL[FRAME_LENGTH]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bL++ = *dmaL++;
    }

    if(flagN_RRPP == 1){
        dmaR = (Uint32*)(&bufN_RR[0]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bR++ = *dmaR++;
    }
    else{
        dmaR = (Uint32*)(&bufN_RR[FRAME_LENGTH]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bR++ = *dmaR++;
    }
}
//------------------------------------------------------------------
volatile int f1=0;
int c1=0;
int spkr_write_block(Uint16* buffer_left, Uint16* buffer_right)
{
    int i;
    Uint32* bL = (Uint32*)buffer_left;
    Uint32* bR = (Uint32*)buffer_right;
    Uint32* dmaL;
    Uint32* dmaR;

    if(flagN_WI == 1)
        flagN_WI = 0;
    else
        return 0;

    if(flagN_WLPP == 1){
        dmaL = (Uint32*)(&bufN_WL[0]);
        for (i = 0; i < FRAME_LENGTH_10/2; i++)
            *dmaL++ = *bL++;
    }
    else {
        dmaL = (Uint32*)(&bufN_WL[FRAME_LENGTH_10]);
        for (i = 0; i < FRAME_LENGTH_10/2; i++)
            *dmaL++ = *bL++;
    }

    if(flagN_WRPP == 1){
        dmaR = (Uint32*)(&bufN_WR[0]);
        for (i = 0; i < FRAME_LENGTH_10/2; i++)
            *dmaR++ = *bR++;
    }
    else{
        dmaR = (Uint32*)(&bufN_WR[FRAME_LENGTH_10]);
        for (i = 0; i < FRAME_LENGTH_10/2; i++)
            *dmaR++ = *bR++;
    }

    c1++;
    if(c1 >= 100)
    {
        if(f1){
            LedON(led_yellow);
            f1 = 0;
        }
        else{
            LedOFF(led_yellow);
            f1 = 1;
        }
        c1 = 0;
    }
    return 1;
}
//-------------------------------------------------------------------------
volatile int f=0;
int co=0;
void F_read_block(Uint16* buffer_left, Uint16* buffer_right)
{
    int i;
    Uint32* bL = (Uint32*)buffer_left;
    Uint32* bR = (Uint32*)buffer_right;
    Uint32* dmaL;
    Uint32* dmaR;

    if(flagF_RI == 1)
        flagF_RI = 0;
    else
        return;

    if(flagF_RLPP == 1){
        dmaL = (Uint32*)(&bufF_RL[0]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bL++ = *dmaL++;
    }
    else{
        dmaL = (Uint32*)(&bufF_RL[FRAME_LENGTH]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bL++ = *dmaL++;
    }

    if(flagF_RRPP == 1){
        dmaR = (Uint32*)(&bufF_RR[0]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bR++ = *dmaR++;
    }
    else{
        dmaR = (Uint32*)(&bufF_RR[FRAME_LENGTH]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *bR++ = *dmaR++;
    }

    co++;
    if(co>100){
        if(f==0){
            LedON(led_red);
            f=1;
        }
        else{
            LedOFF(led_red);
            f=0;
        }
        co=0;
    }
}
//------------------------------------------------------------------

void F_write_block(Uint16* buffer_left, Uint16* buffer_right)
{
    int i;
    Uint32* bL = (Uint32*)buffer_left;
    Uint32* bR = (Uint32*)buffer_right;
    Uint32* dmaL;
    Uint32* dmaR;

    while(flagF_WI == 0);
    flagF_WI = 0;

    if(flagF_WLPP == 1){
        dmaL = (Uint32*)(&bufF_WL[0]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *dmaL++ = *bL++;
    }
    else {
        dmaL = (Uint32*)(&bufF_WL[FRAME_LENGTH]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *dmaL++ = *bL++;
    }

    if(flagF_WRPP == 1){
        dmaR = (Uint32*)(&bufF_WR[0]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *dmaR++ = *bR++;
    }
    else{
        dmaR = (Uint32*)(&bufF_WR[FRAME_LENGTH]);
        for (i = 0; i < FRAME_LENGTH/2; i++)
            *dmaR++ = *bR++;
    }
}
//-------------------------------------------------------------------------

//*************************************************************************
//I2C Init
//*************************************************************************
void i2c_init()
{
    volatile Uint16    looper;
    volatile Uint32    csl_i2c_sys_clk;


    /* Initialize I2C module */
    I2C_init(CSL_I2C0);

    csl_i2c_sys_clk = GetSysClk();
    /* Setup I2C module */
    i2cSetup.addrMode    = CSL_I2C_ADDR_7BIT;
    i2cSetup.bitCount    = CSL_I2C_BC_8BITS;
    i2cSetup.loopBack    = CSL_I2C_LOOPBACK_DISABLE;
    i2cSetup.freeMode    = CSL_I2C_FREEMODE_DISABLE;
    i2cSetup.repeatMode  = CSL_I2C_REPEATMODE_DISABLE;
    i2cSetup.ownAddr     = CSL_I2C_OWN_ADDR;
    //sysclk to i2c, before pre-scaling
    i2cSetup.sysInputClk = csl_i2c_sys_clk/1000u;
    //actual i2c serial clk
    i2cSetup.i2cBusFreq = CSL_I2C_BUS_FREQ;
    startStop            = ((CSL_I2C_START) | (CSL_I2C_STOP));

    I2C_setup(&i2cSetup);
}
//-----------------------------------------------------------------

Uint32 GetSysClk()
{
    Bool      pllRDBypass;
    Bool      pllOutDiv;
    Uint32    sysClk;
    Uint16    pllM;
    Uint16    pllRD;
    Uint16    pllOD;

    pllM = CSL_FEXT(CSL_SYSCTRL_REGS->CGCR1, SYS_CGCR1_M);

    pllRD = CSL_FEXT(CSL_SYSCTRL_REGS->CGCR2, SYS_CGCR2_RDRATIO);
    pllOD = CSL_FEXT(CSL_SYSCTRL_REGS->CGCR4, SYS_CGCR4_ODRATIO);

    pllRDBypass = CSL_FEXT(CSL_SYSCTRL_REGS->CGCR2, SYS_CGCR2_RDBYPASS);
    pllOutDiv   = CSL_FEXT(CSL_SYSCTRL_REGS->CGCR4, SYS_CGCR4_OUTDIVEN);

    sysClk = 32768u;//CSL_PLL_CLOCKIN;

    if (0 == pllRDBypass)
    {
        sysClk = sysClk/(pllRD + 4);
    }

    sysClk = (sysClk * (pllM + 4));

    if (1 == pllOutDiv)
    {
        sysClk = sysClk/(pllOD + 1);
    }

    /* Return the value of system clock in KHz */
    return(sysClk/1000);
}
//-------------------------------------------------------------------------

//*************************************************************************
// AIC Init
//************************************************************************
Int16 AIC3204_rget(  Uint16 regnum, Uint16* regval )
{
    Int16  retcode = 0;
    Uint16 cmd[2];

    cmd[0] = regnum & 0x007F;       // 7-bit Device Register
    cmd[1] = 0;

    Uint16 startStop = ((CSL_I2C_START) | (CSL_I2C_STOP));
    I2C_write(cmd, 2, AIC3204_I2C_ADDR, TRUE, startStop,
                  CSL_I2C_MAX_TIMEOUT);
    //I2C_read(cmd, 1, AIC3204_I2C_ADDR, NULL, 0. TRUE, startStop,
    //             CSL_I2C_MAX_TIMEOUT, FALSE);
    
    *regval = cmd[0];
    Wait_tact( 10 );
    return retcode;
}
//--------------------------------------------------------------------------

void AIC3204_rset( Uint16 regnum, Uint16 regval )
{
    Uint16 cmd[2];
    cmd[0] = (regnum & 0x00FF);       // 7-bit Device Register
    cmd[1] = (regval & 0x00FF);                // 8-bit Register Data

   Wait(300);

   Uint16 startStop = ((CSL_I2C_START) | (CSL_I2C_STOP));
   I2C_write(cmd, 2, AIC3204_I2C_ADDR, TRUE, startStop,
                       CSL_I2C_MAX_TIMEOUT);
}


//****************************************************************************
//AIC init
//****************************************************************************
void aic_init()
{
    // Configure AIC3204
    AIC3204_rset( 0,  0x00 );  // Select page 0
    AIC3204_rset( 1,  0x01 );  // Reset codec
    Wait(1000);  // Wait 1ms after reset
    AIC3204_rset( 0,  0x01 );  // Select page 1
    AIC3204_rset( 1,  0x08 );  // Disable crude AVDD generation from DVDD
    AIC3204_rset( 2,  0x01 );  // Enable Analog Blocks, use LDO power
    AIC3204_rset( 123,0x05 );  // Force reference to power up in 40ms
    Wait(50000); // Wait at least 40ms
    AIC3204_rset( 0,  0x00 );  // Select page 0

    // PLL and Clocks config and Power Up
    if(AIC_SAMPLE_SIZE == 32)
        AIC3204_rset( 27, 0x3d );  // BCLK and WCLK are set as o/p; AIC3204(Master); 32-bit sample
    else
        AIC3204_rset( 27, 0x0d );  // BCLK and WCLK are set as o/p; AIC3204(Master); 16-bit sample

    AIC3204_rset( 28, 0x00 );  // Data ofset = 0
    AIC3204_rset( 4,  0x03 );  // PLL setting: PLLCLK <- MCLK, CODEC_CLKIN <-PLL CLK
    AIC3204_rset( 6,  0x07 );  // PLL setting: J=7
    AIC3204_rset( 7,  0x06 );  // PLL setting: HI_BYTE(D=1680)
    AIC3204_rset( 8,  0x90 );  // PLL setting: LO_BYTE(D=1680)
    AIC3204_rset( 30, 0x88 );  // For 32 bit clocks per frame in Master mode ONLY
                               // BCLK=DAC_CLK/N =(12288000/8) = 1.536MHz = 32*fs
    AIC3204_rset( 5,  0x91 );  // PLL setting: Power up PLL, P=1 and R=1
    Wait(10000); // Wait for PLL to come up
    AIC3204_rset( 13, 0x00 );  // Hi_Byte(DOSR) for DOSR = 128 decimal or 0x0080 DAC oversamppling
    AIC3204_rset( 14, 0x80 );  // Lo_Byte(DOSR) for DOSR = 128 decimal or 0x0080
    AIC3204_rset( 20, 0x80 );  // AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6
    AIC3204_rset( 11, 0x82 );  // Power up NDAC and set NDAC value to 2
    AIC3204_rset( 12, 0x95 );  // Power up MDAC and set MDAC value to 7
    AIC3204_rset( 18, 0x95 );  // Power up NADC and set NADC value to 7
    AIC3204_rset( 19, 0x82 );  // Power up MADC and set MADC value to 2

    // DAC ROUTING and Power Up
    AIC3204_rset( 0,  0x01 );  // Select page 1
    AIC3204_rset( 12, 0x08 );  // LDAC AFIR routed to HPL
    AIC3204_rset( 13, 0x08 );  // RDAC AFIR routed to HPR
    AIC3204_rset( 0,  0x00 );  // Select page 0
    AIC3204_rset( 64, 0x02 );  // Left vol=right vol
    AIC3204_rset( 65, 0x00 );  // Left DAC gain to 0dB VOL; Right tracks Left
    AIC3204_rset( 63, 0xd4 );  // Power up left,right data paths and set channel
    AIC3204_rset( 0,  0x01 );  // Select page 1
    AIC3204_rset( 16, 0x00 );  // Unmute HPL , 0dB gain
    AIC3204_rset( 17, 0x00 );  // Unmute HPR , 0dB gain
    AIC3204_rset( 9 , 0x30 );  // Power up HPL,HPR
    Wait(100 );  // Wait

    // ADC ROUTING and Power Up
    AIC3204_rset( 0,  0x01 );  // Select page 1
    AIC3204_rset( 51, 0x48);  // power up MICBIAS with AVDD (0x40)or LDOIN (0x48)   //MM - added micbias
    AIC3204_rset( 52, 0x30 );  // STEREO 1 Jack
                               // IN2_L to LADC_P through 40 kohm
    AIC3204_rset( 55, 0x30 );  // IN2_R to RADC_P through 40 kohmm
    AIC3204_rset( 54, 0x03 );  // CM_1 (common mode) to LADC_M through 40 kohm
    AIC3204_rset( 57, 0xc0 );  // CM_1 (common mode) to RADC_M through 40 kohm
    AIC3204_rset( 59, 60 );  // MIC_PGA_L unmute
    AIC3204_rset( 60, 60 );  // MIC_PGA_R unmute
    AIC3204_rset( 0,  0x00 );  // Select page 0
    AIC3204_rset( 81, 0xc0 );  // Powerup Left and Right ADC
    AIC3204_rset( 82, 0x00 );  // Unmute Left and Right ADC
    AIC3204_rset( 0,  0x00 );  // Select page 0
    Wait(100 );  // Wait
}

main.h

  • Hi Aleksandr,

    If your code works with CCS with JTAG, but not with the SPI flash, there are three things you should look into:

    1. Did you set the system PLL in the beginning of your application? When using JTAG, the GEL file will automatically set the system PLL to 100Mhz, but when boot from external device like SPI, you have to set the system PLL in your application.

    2. Did you application use the last SARAM block (0x4E000 - 0x4FFFF, 8KB)? This memory block is reserved for bootloader, do not put any code or constants in this area. You can still use it for data buffers.

    3. The MPORT was disabled by the bootloader to save power. You will need to enable the MPORT in your application. Please add the following code in the beginning of your application:

    // Enable HWA, CPU, DPORT, MPORT, XPORT, and IPORT in ICR */
    *(volatile ioport Uint16 *)(0x0001) = 0x000E;
    /* Execute idle instruction */
    asm(" idle");

    Ming
  • Thank you, Ming.
    The first two points are fulfilled by me of course.
    For execution of the third item, I was registers PCGCR1 and PCGCR2:
    CSL_SYSCTRL_REGS->PCGCR1 = 0x1c02;
    CSL_SYSCTRL_REGS->PCGCR2 = 0x0003;
    Is this permissible?
    I can check your option later.
  • Thank you, Ming.

    I've completed your recommendations and everything works well