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Compiler: EBSR CONFIGURATION

Other Parts Discussed in Thread: SPRC133

Tool/software: TI C/C++ Compiler

Hi,

i have my own circuit based on C5505 DSP.

My problem is GPIO. I Need to configure EBSR register in order to manage GPIO 4, GPIO 5 as input, GPIO 6 and GPIO 27 as output.

The problem is that when I act on buttons related to GPIO 4 and 5, no interrupt occurs. 

I configured all the GPIO registers correctly. I need support for EBSR configuration. Now I have configured it like this:

EBSR = 0x023F;

What's wrong in my config?

Thanks in advance,

Paolo

  • Hi,

    I've notified the sw team. They will post their feedback directly here.

    Best Regards,
    Yordan
  • Any suggestion, please? It's urgent

    Thanks a lot

    Paolo

  • Hi Paolo,

    EBSR just routes the peripherals to the pins of the BGA package. It does not control input or output. That is configured in the GPIO peripheral.

    EBSR = 0x023F = 0000 0010 0011 1111
    - PPMODE = 000 Mode 0 (16-bit LCD Controller). All 21 signals of the LCD Bridge module are routed to the 21 external signals of the parallel port.
    - SP1MODE = 00 Mode 0 (eMMC/SD1). All 6 signals of the eMMC/SD1 module are routed to the 6 external signals of
    the serial port 1.
    - SP0MODE = 10 Mode 2 (GP[5:0]). 6 GPIO signals (GP[5:0]) are routed to the 6 external signals of the serial port 0.

    Refer to Figure 1-35. External Bus Selection Register (EBSR) [1C00h] in the C5505 System User's Guide (www.ti.com/.../sprugh5).
    And refer to Table 3-4. LCD Controller, SPI, UART, I2S2, I2S3, and GP[31:27, 20:18] Pin Multiplexing in the C5505 Datasheet (www.ti.com/.../tms320c5505)

    With your configuration...
    - PPMODE is set to Mode 0 (LCD controller) instead of Mode 2, so GPIO 27 is not connected to the pins of the BGA package.
    - SP1MODE is set to Mode 0, eMMC/SD1 instead of Mode 2 , GP[11:6], so GPIO 6 is not connected to the pins of the BGA package
    - SP0MODE is correctly set to Mode 2, for GPIO 4 and 5. You could also have set SP0MODE to Mode 1 for I2S0 and GP[5:4].

    I recommend setting EBSR to 0010 1010 0000 0000b = 0x2A00 to get all the GPIOs you need routed to the pins (assuming no conflict with other peripherals like I2S, SPI, UART, LCD, etc)

    But that does not address your problem. You had EBSR correctly configured for GP5 and GP4, but are not getting interrupts.

    Can you study the GPIO input example (uses ISR) available in CSL3.08 from SPRC133 (www.ti.com/.../sprc133)
    See <path>\c55_csl_3.08\ccs_v6.x_examples\gpio\CSL_GPIO_InputPinExample

    This example uses an interrupt service routine to service GPIO events.

    Hope this helps,
    Mark
  • Hi Mark, 

    thanks for the suggestions.

    I have GPIO 0, 1 2 3 on I2S0_CLK, I2S0_FGS, I2S0_DX, I2S0_RX signals, and GPIO 4 and 5 on GPIO input signals. So the correct configuration should be SP0MODE = 01. (EBSR = 0x100).

    The problem on the interrupt persists. Could you provide some link to example not using CSL?

    Thanks a lot

    Paolo

  • OK the problem is related to codec configuration AIC3204.