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TLV320AIC3204, Damaged HPR and HPL outputs

Other Parts Discussed in Thread: TLV320AIC3204

Hello,

   I am using TI's TLV320AIC3204 device as demonstrated in the circuit below:

If a source with Phantom Power (48VDC) is connected to J6 (lower jack on the schematic), the TLV device suffers permanent damage.

My question is, can you recommend a circuit or an app note that illustrates how to deal with the external DC voltage and prevent damaging the device? 

Any additional recommendations to improve the robustness of this circuit are also welcome.  In advance, thank you for your help.

TG

  • Team,

    Any updates on this?

    Thanks.

  • HI TIguru,

    From a reliability perspective, all analog I/Os should never exceed AVDD supply. The absolute maximum rating for these are -0.3V to AVDD + 0.3V. It might be possible that a zener with 2.4V breakdown voltage might be causing an issue.

    If you are interfacing the HPL/HPR analog outputs to a device that takes balanced analog in with phantom power (possibly) enabled (J6, pins 1 and 4), then using a zener with lower Vbr could help....however, note that this might affect signal swing if LDOin supply is used for headphone amp power and gain levels that cause the signal to exceed say, 1.8V, might be clamped by the zener. By default, signal swing is 0 to +1.8V, 0.707V peak biased around 0.9V common mode on codec pin side..which uses AVDD supply.

    Regards,

    J-