The spec shows Vih MIN is 0.7 x Vcc, does it affect on SD0~3/SC0~3, or it just affect on SCL/SDA?
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This is only for the main SDA/SCL lines since the I2C state machine's inputs are here and not on the secondary channels. The device supports level translation on the secondary so they can be different values from the recommended operating conditions of ViH.