How to setup the TX0 to output the user defined pattern when CDR locked RX0 pattern ?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
See example retimer channel registers configuration procedure below where the retimer channel is set to output defined user pattern equal to clock pattern. Note that the retimer PRBS generator channel requires an input signal of frequency that is a multiple of the full rate for its CDR to lock to be able to generate PRBS data.
REG Value Mask Comment
97 AA FF // Set PRBS FIxed PATGEN (upper byte)
7C AA FF // Set PRBS FIxed PATGEN (lower byte)
1E 80 E0 //Select PRBS Generator for output mux
1E 10 10 //Turn on serializer (ser_en=1)
79 00 60 //Set prbs_gen_en=0
79 20 60 //Set prbs_gen_en=1
30 00 08 //Set prbs_en_dig_clk=0
30 04 04 //Set PRBS FIXED = 1
09 20 20 //Set PFD mux override
HSSC Applications Engineer