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TCA9555: TCA9555 reset the internal state machine

Part Number: TCA9555
Other Parts Discussed in Thread: TCA9534

I'm using four TCA9555 devices over a single I2C bus at 400KHz.  In particulary noisy conditions, the bus is busy and I recover it sendind to the slave TCA9555 a train of 9 clock pulses. 

Is this i2c bus recovery procedure sufficient to generare the full reset of the TCA9555 internal state machineS?

It may also be necessary to implement an additional chip reset procedure other than the I2C bus recovery routine just mentioned, to perform a complete reset of all state machines?

Apart from the busy condition of the i2c bus, is there the possibility that the chip blocks in some other anomalous condition than this one so that it would be better to use TCA9534 which has the reset pin?

Thank you all,

  • Sorry if I am misunderstanding your question. Are you wondering how to preform a power-on reset?

    This device only has the capability of being RESET through a power-on reset. You would preform this by cycling your power:

    There is no need to send any data through the SCL or SDA lines. A Power-on reset will reset the I2C state machine.

    Could you point me to what bus recovery procedure you are talking about? Also if you have any relevant scope shots if you could post them here that would be helpful.

    Best,

    Chris

  • The I²C specification says:

    If the data line (SDA) is stuck LOW, the master should send nine clock pulses. The device that held the bus LOW should release it sometime within those nine clocks. If not, then use the HW reset or cycle power to clear the bus.

    Afterwards, a stop condition should reset the state machine of all devices.