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PCA9548A: PCA9548A, ISO450/ISO451 SCL/SDA status when the chip is power down or reset

Zhizhao Niu
Intellectual 2315 points
Part Number: PCA9548A

Dear team, 

Could you please help to check what is the status of SCL and SDA of PCA9548A, ISO450/ISO451 when device is in power down mode or /reset pin pull low. Are they high impendence? Or pull-down? Thanks.

B.R.

Zhizhao

  • 0
    TI__Genius 15345 points

    Hi Zhizhao,

    I would like to point you to this post written by another Apps Engr Bobby. To summarize what he said:

    t_w(L) is the time that the RESET pin has to be held low before the device recognizes a reset. So between 0s and t_w(L) the device does not recognize the reset so nothing will happen to the pins. Once the device recognizes the reset the SC0-7,SD0-7 pins will be deselected. This means that the FET that bridges the pins will become high impedance. This is the same for power down mode. When the device is powered off the pins are deselected.

    Let me know if you have any further questions.

    Best,

    Chris