DP83869HM: DP83869HM 0x86 register issue

Yang Wu

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

Hi Team,

My customer found that 0X86 register of DP83869HM can't be updated in their project.

I found this post https://e2e.ti.com/support/interface-group/interface/f/interface-forum/908844/dp83869hm-strap-setting-is-not-recognized-registers-readback-fail?ReplyFilter=Answers&ReplySortBy=Answers&ReplySortOrder=Descending that also mentioned this issue, but it seems not the same in my customer's case.

In my customer's case, DP83869HM has RGMII delay enabled as default after reset 0x32 register value is 0x0000 (correct). The ANA_RGMII_DLL_CTR 0x86 register holds 0x64 and can't be updated to other values. For other registers, they can be correctly updated.

Do you know how to solve this issue? Why 0X86 can't be updated?

thanks a lot.

Best regards,

Yang

over 2 years ago

0 Kallikuppa Sreenivasa over 2 years ago

TI__Guru** 123118 points

Hello Tang Wu,

Thank you for the query.

Could you please confirm with customer if they are following the below to access the register

9.4.9.1 Extended Address Space Access

The DP83869HM SMI function supports read or write access to the extended register set using registers REGCR (0x000Dh) and ADDAR (0x000Eh) and the MDIO Manageable Device (MMD) indirect method defined in IEEE 802.3ah Draft for clause 22 for accessing the clause 45 extended register set. The standard register set, MDIO registers 0 to 31, is accessed using the normal direct-MDIO access or the indirect method, except for register REGCR (0x000Dh) and ADDAR (0x000Eh) which is accessed only using the normal MDIO transaction. The SMI function ignores indirect accesses to these registers. REGCR (0x000Dh) is the MDIO Manageable MMD access control. In general, register REGCR(4:0) is the device address DEVAD that directs any accesses of ADDAR (0x000Eh) register to the appropriate MMD. The DP83869HM supports one MMD device address. The vendor-specific device address DEVAD[4:0] = 11111 is used for general MMD register accesses.

Regards,

Sreenivasa

0 Yang Wu over 2 years ago in reply to Kallikuppa Sreenivasa

TI__Intellectual 2830 points

Hi Sreenivasa,

I will let customer to check. One more question, does DP83869HM can use 50MHz clock, instead of 25MHz?

thanks a lot.

Best regards,

Yang

0 Kallikuppa Sreenivasa over 2 years ago in reply to Yang Wu

TI__Guru** 123118 points

Hello Tang Wu,

Thank you for the message,

Please note that the DP83869 requires 25MHz clock input.

Regards,

Sreenivasa

0 Yang Wu over 2 years ago in reply to Kallikuppa Sreenivasa

TI__Intellectual 2830 points

Hello Sreenivasa,

thanks for your confirm. Another question is that customer found RX_DV signal abnormal (Repeatable in all board) shown as below (a short time spur after the normal signal), resulting CRC error issue. Do you know how this can happen?

thanks a lot.

Best regards,

Yang

0 Kallikuppa Sreenivasa over 2 years ago in reply to Yang Wu

TI__Guru** 123118 points

Hello Yang,

Thank you for the message.

I did not see any info attached.

Also, do you have the customer schematics for a quick review.

Regards,

Sreenivasa

0 Yang Wu over 2 years ago in reply to Kallikuppa Sreenivasa

TI__Intellectual 2830 points

Hi Sreenivasa,

Let me send you offline through email. thanks.

+1 Kallikuppa Sreenivasa over 2 years ago in reply to Yang Wu

TI__Guru** 123118 points

Hello Yang,

Noted. We can continue the discussion over email.

Regards,

Sreenivasa

0 Yang Wu over 2 years ago in reply to Kallikuppa Sreenivasa

TI__Intellectual 2830 points

Hi Sreenivasa,

OK. I have sent you and email, let's close this post.

Yang

0 Kallikuppa Sreenivasa over 2 years ago in reply to Yang Wu

TI__Guru** 123118 points

Hello Yang,

Thanks for the message.

Regards,

Sreenivasa

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DP83869HM: DP83869HM 0x86 register issue