DS90UH926Q-Q1: Dual lane switch to single lane automatically

This is awesome Casey, thankyou very much for the fast response.

So just to double check, I am using the UH926 part connected via the serial link to a UH941 serializer.

this will definitely work?

and the 926 automatically set dual or single at power up or any time the link is detected as present?

thanks again

William

Thanks again Casey, really appreciate your feedback.

You say 941AS, but 941AQ too?

Best regards

William

Thanks Casey. Do you know the difference between the AS and the AQ. I can’t find anything on the AQ part. Maybe I am not looking carefully enough.

Best Regards

William

Thanks very much Casey. I was hoping to hear that.

So I have one more question.

On my board the 926 is displaying correct syncs timings on the HS, VS, DE pins for the screen resolution and LOCK and PASS pins are good but the pixel clk is half the expected 75.4MHz suggesting the 941 is still running in 2 lane mode and there is definitely signal still on the unused pair.

I imagine I am not setting something correctly. Any thoughts.

Thanks again

William

Hello William,

What MODE strapping are you using for 941? Also can you share your initialization code?

Finally, what is your DSI input clock frequency to the 941?

Best Regards,

Casey 

Hi Casey, well maybe this is where my problem is, the unit containing the 941 is out of my control, it is third party equipment.

So unless I can remotely change things from this end of the lane am I stuck?

So is it not so automatic?

Thanks again

William

Hello William,

well that depends on what was done on the 941 side. If the 941 is strapped for splitter mode or is configured through SW to force a specific mode then that could be causing your problem here

Best Regards,

Casey

Sorry to harp on Casey, not sure what time you finish work, but just quickly, the normal use of the 941 in this equipment is that it connects via dual lane to a display panel to the 948 running as 2 lane in to a single output(so it is 2in 1out) and on to the display. Unused 2nd outputs terminated.

It is an application where our equipment sits between the 941 and the 948 in the screen in this case.

We use the UB926/UB925 in many other similar systems that work well but of course are single lane.

We also are licensed adopters of theTI HDCP versions, hence the UH versions.

I have to decide if we infact need a dual lane version in this case so need to rule out everything before the final decision.

I will try to investigate the 941 side a bit further.

Best Regards

William

Hello William, 

Ok so the default behavior of the 94x devices is that when they are powered on, they will automatically select an operating mode based on how they are connected and the PCLK rate. 

The exceptions to that would be:

- If the PCLK rate provided to the SER is too high for single link but you have only one lane connected (invalid configuration) 

- If the 941 is mode strapped for splitter mode (because in this mode the two lanes operate independently to connect to two different DES devices)

- If the user has forced a lane configuration in the SER or DES sides via register configuration  

So in this case, my assumption is that if the original system was designed for 941->948, it’s possible that it is designed to support higher PCLK rate than what single link can support. The max single link rate for 926 is 85MHz. Alternatively the SER side may have been configured to force dual mode through registers in which case you would need to consult the SER side HW to adjust. 

So I think to understand more clearly what is going on here you would probably need to get more detail from the system designer of the 941 side

Best Regards,

Casey

Hi Casey, I am still waiting for a reply from Customer support about the NDA but in the meantime. There is obviously a special reason why there is a NDA version of the 941. Can I ask what that is?

As far as PCLK goes, as I said the 926 outputs correct sync timings for the screen size but a PCLK at half of the expected 75.4MHz.

and, unless I can make setting alterations at the 941 end remotely I am sunk I imagine?

Best Regards

William

Hello William,

For discussions on 941A vs 941AS, we need to discuss with an NDA. 

If the 926 is outputting 1/2 the PCLK frequency of your expectation then my assumption is that the source side is configured for dual link mode, but then you are connecting only single link. 

You could try to set the channel mode of the 941 through the back channel although I'm not sure that this will work based on not knowing much about the 941 configuration that has been done here. You would issue an I2C pass through command from the 926 to the 941AS to set 941AS 0x5B[2:0] = b'000 or b'001

Best Regards,

Casey 

Thanks Casey. I’ll give it a go. 
I appreciate your help.

I thought that might be the case with the NDA.

Am hoping the TI contact will be back to me tomorrow.

Best Regards

William

Hello William,

Ok let me know if you need additional support here 

Best Regards,

Casey 

Will do Casey thanks.

just seen this morning the 941 has a flag to disable remote modification of the local registers too

Hello William,

Understood - in this case it seems best if you could coordinate with the serializer system vendor for this project since it seems there was some intentional measures put in place to prevent tampering with the system topology 

Best Regards,

Casey