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DP83TG720S-Q1: Not link up

Part Number: DP83TG720S-Q1

Hi,

I'm trying to bring-up DP83TG720S in Linux, RGMII loopback mode now worked well. So next, I tried to link up DP83TG720S to a switch device. In the DP83TG720S driver, I forced it to work in 1000Mbps/Full Duplex mode. But value of BMSR register is always 0x141 showing "Link down" status and "Energy det change interrupt"( bit 14 0x12 register) raises all time. I don't know where is the problem. Can anyone help me to debug the issue.

Thanks.

HungVu

  • Hello Hung,

    Can you read register 0x0001 twice to see if you get 0x0145? 

    Is the device connected to link-partner over the cable? Is 720S in master mode or slave mode? Is the link-partner configured in opposite mode?

    Kindly share the value of register 0x045D to check if the PHY is booting up in desired mode.

    --

    Regards,

    Vikram

  • Thank Vikram,

    Yes, The Linux driver always reads 0x0001 twice by default, two results are 0x0141 all time and of course, I plugged-in the cable.There is a small problem that I don't know partner whether is Master or Slave, It's a switch device converting 1000BaseT to 1000BaseT1 standard. So, I tried configuring 720S running in 2 cases Master and Slave. But 720S didn't show link up status in both cases.

    Value of 0x045D is 0x9164 and 0x9144 in Master and Slave mode respectively. It seems to be correct ?

  • Hi Vikram, I haven't solved this problem yet. I can not link up the phy with the switch device and though I do not sure that switch device working fine now. So, I want to find an other solution. Is there any other solutions to check DP83TG720S implementation in our designed board ? Can I connect two DP83TG720Ss directly via single twisted pair cable, 2 PHYs are controlled by 2 processor individually ?

  • Hello Hung,

    0x045D values are as expected. Can you also check following :

    1. 0x045E register value?

    2. Try link-up after writting 0x018C = 0x0001

    And yes if we are doubting link partner then lets try both side as 720S (one configured as master and other as slave).

    Also you may share the schematic and I can check if there is a problem on the board.

    --

    Regards,

    Vikram

  • Hi Vikram,

    By default, the 720S linux driver configures a list of registers with values before working and I see some registers that aren't listed in datasheet. Where are them from ?

    {0x894, 0x5df7},
    {0x56a, 0x5f40},
    {0x405, 0x5800},
    {0x8ad, 0x3c51},
    {0x894, 0x5df7},
    {0x8a0, 0x9e7},
    {0x8c0, 0x4000},
    {0x814, 0x4800},
    {0x80d, 0x2ebf},
    {0x8c1, 0xb00},
    {0x87d, 0x001},
    {0x82e, 0x000},
    {0x837, 0x0f4},
    {0x8be, 0x200},
    {0x8c5, 0x4000},
    {0x8c7, 0x2000},
    {0x8b3, 0x05a},
    {0x8b4, 0x05a},
    {0x8b0, 0x202},
    {0x8b5, 0x0ea},
    {0x8ba, 0x2828},
    {0x8bb, 0x6828},
    {0x8bc, 0x028},
    {0x8bf, 0x000},
    {0x8b1, 0x014},
    {0x8b2, 0x008},
    {0x8ec, 0x000},
    {0x8c8, 0x003},
    {0x8be, 0x201},
    {0x56a, 0x5f40},
    {0x18c, 0x001},

    Register 0x18c is assigned 0x001 at the end to enter normal mode

    Although 0x45E = 0x0000: 720S working on autonomous mode.

    This is my schematic for 720S on my board:

  • I wanna ask another question, when I set both side of link partner as 720s, one is as master and another is slave. Both side with fixed 1Gbps/Full-duplex, How link-up status is detected and set in this case (without auto-negotiation) ? Can you explain mechanism of detecting link up status in both side ?

  • Hung,

    Many registers in the initialization configuration of driver are the DSP registers for EMC performance improvement and are not exposed directly in the datasheet. 

    Can you please share the schematic with connection till the connector?

    Link status can be checked by reading register 0x0001 of 720S. There is a IEEE standard defined hand-shake sequence involved during the link up. 

    --

    Regards,

    Vikram

  • Vikram, thanks for your reply !

    this is our schematic designed for connection to connector. 

    "Link status can be checked by reading register 0x0001 of 720S. There is a IEEE standard defined hand-shake sequence involved during the link up" I mean that Does 720s need link pulses to detect link up status when it does not use auto-negotiation ? I have just tested switch device and see it is works well and generates 20ms link pulse on the link.
  • Hung,

    Kindly share the CMC number in the schematic. Is it same as what is recommended in datasheet?

    During link-up sequence, there are defined patterns exchanged between devices called "send-s" symbols. 

    --

    Regards,

    Vikram

  • Thanks Vikram,

    - We use AE5002: :https://www.digikey.com/en/products/detail/pulse-electronics-network/AE5002/9607795, please help me review it. we try to select components that are equal or most close to recommendation in datasheet.

    Hope for your quick reply. 

  • Hello Hung,

    We dont have any performance data with AE5002 but our simulation results indicate that recommended chokes in the datasheet has better performance (at least EMC performance is better). I am not sure if AE5002 selection is the reason of the link-loss but we can try bypassing this part and see if situation improves. 

    As you shared earlier that internal loopbacks are working fine + register reads are as expected , so PHY must be powering up fine and must be getting stuck somewhere while linking up with remote partner. Were you able to check TI-TI link?

    --

    Regards,

    Vikram

  • Hi Vikram,

    Actually, we are stuck here in bring-up 720s PHY. I really need your help to confirm some problems:

    1. A lot of registers were configured by TI and as I know, Link-up process are autonomous process internally. Can you help me list configs affecting to result of link-up process that I'm able to control. I wanna confirm whether I configured 720s working correctly or not. So, I can decide a hardware check on my designed board, try using another link partner for next step.

    Of course, as I shared earlier, I tried running internal loopback modes and it works well and registers you need me check giving the result as expected.

    A little information I have just debugged, register 3901H = 0x80 shows PCS Fault condition detected. Does it give any hint ?

    2. About TI-TI link, I haven't try it yet but will do it now because of failure in link-up with the switch device. I have some question to set up it correctly. Just set up one is master and remaining is slave but how link-up signal will be sent from one to remaining ? Link-up signal is sent automatically or need any register setting ?

    Hope for your reply, thanks !

    Hung

  • Hung,

    If PHY is configured in autonomous mode (no strap pull-up on led_1) and required master/slave mode (required strap on led_0) through bootstraps then you dont need any configuration for link-up and data transfer. All the other settings in the driver are to optimize the EMC performance. 

    If by default the PHY is configured in managed mode (strap pull-up on led_1) then you need to write register 0x018C = x0001 to start the link-up process. As mentioned earlier everything else is to optimize the EMC performance.

    If you are doubting any wrong register writes as root cause of problem, then after power-up write 0x001F = x8000  to erase all the programmed PHY registers and you may try linking up with required minimum register writes.

    I suggest you try above mentioned steps : TI-TI link-up, bypassing AE5005, using minimum registers

    --

    Regards,

    Vikram

  • Thanks Vikram, I will try and give you feedback